MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 123

• Manufacturer Part Number: MC9S12C128VFU
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12C128VFU

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

vector spaces, expansion windows, and on-chip memory are mapped so that their address ranges do not
overlap. The MMC will make only one select signal active at any given time. This activation is based upon
the priority outlined in
signal for the block with the highest priority will become active. An example of this is if the registers and
the RAM are mapped to the same space, the registers will have priority over the RAM and the portion of
RAM mapped in this shared space will not be accessible. The expansion windows have the lowest priority.
This means that registers, vectors, and on-chip memory are always visible to a program regardless of the
values in the page select registers.
In expanded modes, all address space not used by internal resources is by default external memory space.
The data registers and data direction registers for ports A and B are removed from the on-chip memory
map and become external accesses. If the EME bit in the MODE register (see MEBI block description
chapter) is set, the data and data direction registers for port E are also removed from the on-chip memory
map and become external accesses.
In special peripheral mode, the first 16 registers associated with bus expansion are removed from the on-
chip memory map (PORTA, PORTB, DDRA, DDRB, PORTE, DDRE, PEAR, MODE, PUCR, RDRIV,
and the EBI reserved registers).
In emulation modes, if the EMK bit in the MODE register (see MEBI block description chapter) is set, the
data and data direction registers for port K are removed from the on-chip memory map and become
external accesses.
3.4.2.2
When the EMK bit in the MODE register (see MEBI block description chapter) is set, port K bit 7 is used
as an active-low emulation chip select signal, ECS. This signal is active when the system is in emulation
mode, the EMK bit is set and the FLASH or ROM space is being addressed subject to the conditions
outlined in
EMK bit is clear, this pin is used for general purpose I/O.
3.4.2.3
When the EMK bit in the MODE register (see MEBI block description chapter) is set, port K bit 6 is used
as an active-low external chip select signal, XCS. This signal is active only when the ECS signal described
above is not active and when the system is addressing the external address space. Accesses to
Freescale Semiconductor
Section 3.4.3.2, “Extended Address (XAB19:14) and ECS Signal
Emulation Chip Select Signal
External Chip Select Signal
Table
Priority
Highest
Lowest
...
...
...
...
3-15. If two or more blocks share the same address space, only the select
MC9S12C-Family / MC9S12GC-Family
Table 3-15. Select Signal Priority
BDM (internal to core) firmware or register space
Remaining external space
EEPROM memory block
On-chip FLASH or ROM
Internal register space
Rev 01.24
RAM memory block
Address Space
Chapter 3 Module Mapping Control (MMCV4) Block Description
Functionality.” When the
123