MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 313

• Manufacturer Part Number: MC9S12C128VFU
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12C128VFU

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Module Base + 0x001C (CANIDMR4)
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1)
Freescale Semiconductor
AM[7:0]
Field
7:0
Reset
Reset
Reset
Reset
Figure 10-22. MSCAN Identifier Mask Registers (Second Bank) — CANIDMR4–CANIDMR7
W
W
W
W
R
R
R
R
0x001D (CANIDMR5)
0x001E (CANIDMR6)
0x001F (CANIDMR7)
Acceptance Mask Bits — If a particular bit in this register is cleared, this indicates that the corresponding bit in
the identifier acceptance register must be the same as its identifier bit before a match is detected. The message
is accepted if all such bits match. If a bit is set, it indicates that the state of the corresponding bit in the identifier
acceptance register does not affect whether or not the message is accepted.
0 Match corresponding acceptance code register and identifier bits
1 Ignore corresponding acceptance code register bit
AM7
AM7
AM7
AM7
0
0
0
0
7
7
7
7
Table 10-22. CANIDMR4–CANIDMR7 Register Field Descriptions
AM6
AM6
AM6
AM6
6
0
6
0
6
0
6
0
MC9S12C-Family / MC9S12GC-Family
AM5
AM5
AM5
AM5
0
0
0
0
5
5
5
5
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Rev 01.24
AM4
AM4
AM4
AM4
4
0
4
0
4
0
4
0
Description
AM3
AM3
AM3
AM3
0
0
0
0
3
3
3
3
AM2
AM2
AM2
AM2
2
0
2
0
2
0
2
0
AM1
AM1
AM1
AM1
0
0
0
0
1
1
1
1
AM0
AM0
AM0
AM0
0
0
0
0
0
0
0
0
313