MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 39

• Manufacturer Part Number: MC9S12C128VFU
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12C128VFU

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

0x0140–0x017F
1. Not available on the MC9S12GC Family members. Those memory locations should not be accessed.
Freescale Semiconductor
Address
0x015C–
Address
0x0150–
0x0154–
0x0158–
0x0160–
0x0170–
0xXXX0
0xXXX1
0x014A
0x014B
0x014C
0x014D
0x014E
0x015B
0x0146
0x0147
0x0148
0x0149
0x014F
0x0153
0x0157
0x015F
0x016F
0x017F
CANIDMR0 -
CANIDMR4 -
CANRXERR
CANIDAR0 -
CANIDAR4 -
CANxRIDR0
CANxRIDR1
CANTXERR
Extended ID
Extended ID
CANTBSEL
CANIDMR3
CANIDMR7
Standard ID
Standard ID
CANIDAR3
CANIDAR7
CANRXFG
CANTARQ
CANTXFG
CANTFLG
CANTAAK
CANIDAC
CANTIER
Reserved
Reserved
Name
Name
Table 1-2. Detailed MSCAN Foreground Receive and Transmit Buffer Layout
CAN (Scalable Controller Area Network — MSCAN)
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read: RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1 RXERR0
Write:
Read: TXERR7
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Read:
Write:
Read:
Read:
Write:
Bit 7
AM7
AM7
Bit 7
ID28
ID10
ID20
AC7
AC7
ID2
0
0
0
0
0
0
0
0
MC9S12C-Family / MC9S12GC-Family
TXERR6
Bit 6
Bit 6
AM6
AM6
ID27
ID19
AC6
AC6
ID9
ID1
0
0
0
0
0
0
0
0
FOREGROUND TRANSMIT BUFFER see
FOREGROUND RECEIVE BUFFER see
Rev 01.24
TXERR5
IDAM1
Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)
Bit 5
Bit 5
ID26
ID18
AM5
AM5
AC5
AC5
ID8
ID0
0
0
0
0
0
0
0
TXERR4
SRR=1
IDAM0
Bit 4
AM4
AM4
Bit 4
ID25
AC4
AC4
RTR
ID7
0
0
0
0
0
0
0
TXERR3
IDE=1
IDE=0
Bit 3
Bit 3
AM3
AM3
ID24
AC3
AC3
ID6
0
0
0
0
0
0
0
0
ABTRQ2 ABTRQ1 ABTRQ0
TXERR2
ABTAK2
TXEIE2
IDHIT2
TXE2
Bit 2
Bit 2
ID23
ID17
AM2
AM2
TX2
AC2
AC2
ID5
Table 1-2
0
0
Table 1-2
(1)
(continued)
TXERR1
ABTAK1
TXEIE1
IDHIT1
TXE1
Bit 1
AM1
AM1
Bit 1
ID22
ID16
AC1
AC1
TX1
ID4
0
0
TXERR0
ABTAK0
TXEIE0
IDHIT0
TXE0
Bit 0
Bit 0
AM0
AM0
ID21
ID15
AC0
AC0
TX0
ID3
0
0
39