IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 90

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Table 34.
8.1.3.3
8.1.4
8.2
8.2.1
Intel NetStructure
TPS
90
®
SEL record format used for Reset events
Timestamps
One of the internal BMC timers is used as a clock. Because this kind of clock does not
maintain the its value during a board power-down period, at each startup, the BMC
issues a SEL Get Time command to get the time from the ShMC and set the internal
BMC timer. This ensures that the BMC can set the correct event time-stamps.
The timestamp format used by the BMC conforms to the definition described in the
IPMI 1.5 specification.
Temporary Upgrade Storage
Temporary upgrade storage on the BMC local flash is a block of eight flash sectors used
as temporary storage for image files used during the CPLD and FRU upgrade process.
IPMI Protocol Support
The BMC fully supports the IPMI 1.5 rev. 1.1. This protocol is used for communication
with the ShMC over the IPMB. See
page 90
The BMC also supports the PICMG 3.0 OEM mandatory command set. See
8.2.2, “PICMG 3.0 IPMI Command Support” on page 95
support.
In addition, the BMC supports a set of Intel OEM commands and board-specific
commands. See
IPMI 1.5 Command Support
Table 35
grouped by general function, with an indication of whether the command is mandatory
(M) or optional (O) from the PICMG point-of-view. There is also information on whether
a given command is supported (S) or not supported (N) by the BMC.
Byte
12
13
14
IXB2850 Packet Processing Boards
Field
Reset Type
Reset Reason
Reset Info
for more information.
lists the commands defined in the IPMI 1.5 specification. Each command is
Appendix D, “OEM IPMI Commands”
Description
Reset Type:
Reset Reason defined as follows:
Reset Type = Entire Board reset:
Reset Type = NPU reset:
Reset Type = BMC reset:
Additional reset information
• 00h – Entire board reset
• 01h – BMC reset
• 02h – NPU reset
• 00h – Operator initiated board power-down
• 01h – BMC initiated board power-down performed under ShMC control
• 02h – BMC controlled board power-down. Reset Info byte contains
• 00h – Operator initiated NPU reset
• 01h – NPU reset by BMC
• 02h – NPU watchdog reset
• 00h – Operator initiated BMC reset
number of sensor that was a reason of the particular reset
Section 8.2.1, “IPMI 1.5 Command Support” on
IXB2850—Board Management Controller Firmware
for details.
for details on the level of
Document Number: 05-2443-006
Section
January 2007