IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 50

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Table 15.
Table 16.
Intel NetStructure
TPS
50
®
BMC boot parameters definition
NPU boot parameters definition
Offset
(bytes)
0
1
Offset
(bytes)
0
1
IXB2850 Packet Processing Boards
Length
(bytes)
1
2
Length
(bytes)
1
1
Definition
Boot flags:
Short POST contents
A bitmask describing which tests have to be performed during POST. If a given bit is
set then a corresponding test is performed during BMC POST:
Definition
Boot Flags:
Script timeout – Number of seconds of delay before launching the boot script
• 7:5 – NPU Boot Parameters definition format version (=1h for this
• 4:4 – POST type; a flag indicating the type of Power-On-Self-Test performed by
• 3:3 – Soft reset; a flag indicating whether the soft reset is being performed. This
• 2:2 – Run-time image loading; a flag indicating whether the Boot Monitor shall
• 1:1 – SRAM initialization; a flag determining the SRAM initialization method.
• 0:0 – Reserved
• 7:5 – BMC Boot Parameters definition format version (=0h for this
• 4:4 – POST type. A flag indicating type of Power-On-Self-Test (POST) performed
• 3:0 – Reserved
• 15:15 – IRQ
• 14:14 – GPIO
• 13:13 – Flash
• 12:12 – Internal RAM
• 11:11 – External RAM
• 10:10 – IPMB
• 9:9 – local I
• 8:8 – embedded UARTs
• 7:7 – external quad UART
• 6:6 – Keyboard Controller Style (KCS)
• 5:5 – LEDs
• 4:4 – Timers
• 3:0 – Reserved
definition)
by BMC during board startup. This parameter can have one of two values:
- 0b Long POST (all tests will be performed)
- 1b Short POST (only selected tests will be performed)
definition)
the Boot Monitor during board startup. This parameter can have one of two
values:
- 0b Long POST
- 1b Short POST
flag is used by POST to perform the appropriated POST set and can have one of
two values:
- 0b Normal startup
- 1b Soft reset
load and execute the run-time image for the NPU. This flag can have one of two
values:
- 0b – Image load; the Boot Manager attempts to load and execute run-time
image code
- 1b – Command prompt; the Boot Manager does not attempt to load the run-
time image code, displays a command prompt and waits for operator action (for
example, diagnostics execution)
This flag is used by RedBoot* to initialize SRAM memory using one of the
following methods:
- 0b – Initialized with zero; the entire SRAM memory is filled with zeros
- 1b – Initialized with current value; every SRAM memory location will be
rewritten with the current value of such memory location to correct possible
parity errors
2
C buses
IXB2850—Hardware Management
Document Number: 05-2443-006
January 2007