IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 240

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

Note:
C.2.12
Note:
C.2.13
Intel NetStructure
TPS
240
®
All memory addresses are entered in hexadecimal format without the 0x prefix.
Syntax
i2cwrite slave_addr offset_addr data
Parameters
Example
i2write 4 30 123456789abcdef123456
io
Read (r) or write (w) a byte (b), word (w) or dword (d) from/to a PCI IO.
All memory addresses are entered in hexadecimal format without the 0x prefix.
Syntax
io[rw] [bwd]
iorb addr rept silent
iowb addr data rept
iorw addr rept silent
ioww addr data rept
iord addr rept silent
iowd addr data rept
Parameters
Example
iorb 1 0 0
ioff
Disable instruction cache.
Syntax
ioff
• slave_addr address of the I
• offset_addr memory address inside the I
• data hexadecimal string to write to I
• addr- memory address that will be written to/read from
• rept repeat this on a loop. Can be set as follows:
• data- data to write to the memory address
• silent- do not trace any information on the console
IXB2850 Packet Processing Boards
— 0- perform a read or write one time only
— 1- perform a read or write on a loop until a key is pressed
— 0- display information on the console
— 1- run in silent mode
2
C device on the bus
2
C device memory
2
C device
Document Number: 05-2443-006
IXB2850—Diagnostics
January 2007