IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 296

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Table 71.
Intel NetStructure
TPS
296
®
GbEMAC_Ioctl( ) SET commands and IXF1104 register map (Continued)
Ioctl
SET_RFIFO_HIGH_WATERMARK
SET_RFIFO_LOW_WATERMARK
SET_RX_FIFO_PORT_RESET
SET_RX_FIFO_FRAME_DROP
SET_CAPTURE_ENABLE_RX_FIFO
SET_PRE_PENDING_CRC_ENABLE
SET_JUMBO_PKT_SIZE
TX FIFO Registers
SET_TX_FIFO_HIGH_WATERMARK
SET_TX_FIFO_LOW_WATERMARK
SET_MAC_THRESHOLD
SET_LOOP_RX_TX
SET_TX_FIFO_PORT_RESET
SET_TX_MINI_FRAME_SIZE
MDIO Registers
SET_MDIO_CMD_ADDR
SET_MDIO_SINGLE_RW_DATA
SET_AS_PHY_ADDR
SET_MDIO_CTL
SPI-3 Registers
SET_SPI3_TX_CONFIG
SET_SPI3_RX_CONFIG
SerDes Registers
SET_ACDC_COUPLING
SET_RX_DATA_SYNC
GBIC Registers
SET_GBIC_CTL
SET_I2C_CTL_DATA
IXB2850 Packet Processing Boards
MAC Register
RX FIFO High Watermark Port 0, RX FIFO High Watermark Port
1, RX FIFO High Watermark Port 2, RX FIFO High Watermark
Port 3
RX FIFO Low Watermark Port 0, RX FIFO Low Watermark Port
1, RX FIFO Low Watermark Port 2, RX FIFO Low Watermark
Port 3
RX FIFO Port Reset
RX FIFO Errored Frame Drop Enable
RX FIFO Loopback Enable
RX FIFO Padding and CRC Strip Enable
RX FIFO Jumbo Packet Size Port 0, RX FIFO Jumbo Packet Size
Port 1, RX FIFO Jumbo Packet Size Port 2, RX FIFO Jumbo
Packet Size Port 3
TX FIFO High Watermark Port 0, TX FIFO High Watermark Port
1, TX FIFO High Watermark Port 2, TX FIFO High Watermark
Port 3
TX FIFO Low Watermark Port 0, TX FIFO Low Watermark Port
1, TX FIFO Low Watermark Port 2, TX FIFO Low Watermark
Port 3
TX FIFO MAC Threshold Port 0, TX FIFO MAC Threshold Port 1,
TX FIFO MAC Threshold Port 2, TX FIFO MAC Threshold Port 3
Loop RX Data to TX FIFO
TX FIFO Port Reset
TX FIFO Mini Frame Size for MAC and Padding Enable Port 0 to
3
MDI Single Command
MDI Single Read and Write Data
Autoscan PHY Address Enable
MDI Control
SPI-3 Transmit and Global Configuration
SPI-3 Receive Configuration
Tx and Rx ACDC Coupling Selection
Clock and IF Mode Change Enable Ports 0-3
GBIC Control Ports 0-3
I2C Control Ports 0-3
IXB2850—Driver API Reference
Document Number: 05-2443-006
January 2007