IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 299

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

Driver API Reference—IXB2850
Table 72.
January 2007
Document Number: 05-2443-006
GbEMAC_Ioctl( ) GET commands and IXF1104 register map (Continued)
Ioctl
GET_MDIO_RESET
GET_UI_ENDIAN_MODE
GET_LED_MODE
GET_LED_FLASH_RATE
GET_LED_FAULT_ACTION
GET_JTAG_ID
RX FIFO Registers
GET_RFIFO_HIGH_WATERMARK
GET_RFIFO_LOW_WATERMARK
GET_RX_FIFO_PORT_RESET
GET_RX_FIFO_FRAME_DROP
GET_RX_FIFO_OVERFLOW_STT
GET_DROPPED_PKTS
GET_CAPTURE_ENABLE_RX_FIFO
GET_PRE_PENDING_CRC_ENABLE
GET_MATCHING_PATTERN
GET_JUMBO_PKT_SIZE
TX FIFO Registers
GET_TX_FIFO_HIGH_WATERMARK
GET_TX_FIFO_LOW_WATERMARK
GET_MAC_THRESHOLD
GET_TX_FIFO_OVERFLOW_STT
GET_LOOP_RX_TX_STT
GET_TX_FIFO_PORT_RESET
GET_TX_DROP_FRAME
GET_TX_DROP_PKTS
GET_TX_OCCUPANCY
GET_TX_MINI_FRAME_SIZE
MAC Register
MDIO Reset
Microprocessor Interface
LED Control
LED Flash Rate
LED Fault Disable
JTAG ID (Device Revision)
RX FIFO High Watermark Port 0, RX FIFO High Watermark Port
1, RX FIFO High Watermark Port 2, RX FIFO High Watermark
Port 3
RX FIFO Low Watermark Port 0, RX FIFO Low Watermark Port
1, RX FIFO Low Watermark Port 2, RX FIFO Low Watermark
Port 3
RX FIFO Port Reset
RX FIFO Errored Frame Drop Enable
RX FIFO Overflow Event
RX FIFO Number of Error Packets Dropped Port 0, RX FIFO
Number of Error Packets Dropped Port 1, RX FIFO Number of
Error Packets Dropped Port 2, RX FIFO Number of Error Packets
Dropped Port 3
RX FIFO Loopback Enable
RX FIFO Padding and CRC Strip Enable
RX FIFO Jumbo Packet Size Port 0, RX FIFO Jumbo Packet Size
Port 1, RX FIFO Jumbo Packet Size Port 2, RX FIFO Jumbo
Packet Size Port 3
TX FIFO High Watermark Port 0, TX FIFO High Watermark Port
1, TX FIFO High Watermark Port 2, TX FIFO High Watermark
Port 3
TX FIFO Low Watermark Port 0, TX FIFO Low Watermark Port
1, TX FIFO Low Watermark Port 2, TX FIFO Low Watermark
Port 3
Threshold Port 1, TX FIFO MAC Threshold Port 2, TX
TX FIFO Overflow/Underflow Event/Out of Sequence
Loop RX Data to TX FIFO
TX FIFO Port Reset
TX FIFO Number of Frames Removed Port 0, TX FIFO Number
of Frames Removed Port 1, TX FIFO Number of Frames
Removed Port 2, TX FIFO Number of Frames Removed Port 3
TX FIFO Number of Dropped Packets Port 0, TX FIFO Number of
Dropped Packets Port 1, TX FIFO Number of Dropped Packets
Port 2, TX FIFO Number of Dropped Packets Port 3
TX FIFO Occupancy Counter for Port 0, TX FIFO Occupancy
Counter for Port 1, TX FIFO Occupancy Counter for Port 2, TX
FIFO Occupancy Counter for Port 3
TX FIFO Mini Frame Size for MAC and Padding Enable Port 0 to
3
Intel NetStructure
®
IXB2850 Packet Processing Boards
TPS
299