IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 41

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Hardware Management—IXB2850
Note:
Note:
4.5.3
January 2007
Document Number: 05-2443-006
An NPU reset does not affect the BMC and entire board powerup sequence. However,
since the NPU is the bus master, the NPU reset does reset the PCI bus and therefore
effectively resets the Quad Gigabit Ethernet Mezzanine Card and the Adjunct Processor
(AP) card.
The NPU CPLD does not perform a hardware NPU reset, but generates an NPU
interrupt. A routine supporting this interrupt (for both Boot Monitor and Linux versions)
should first indicate to the NPU CLPD that the NPU is able to reset itself. This should be
done before the next watchdog expiration. In other cases, a hardware reset of the NPU
is performed by the CPLD.
A warm reset of the NPU using the FRU Control IPMI command is not supported.
NPU Watchdogs
There are two watchdog mechanisms used to supervise the NPU:
The CPLD hardware watchdog has a constant interval of 250ms and is used to
supervise Boot Monitor startup, as well as the main Linux* watchdog. This watchdog is
kicked by writing to a CPLD register.
The software watchdog is used to supervise Boot Monitor operation, as well as loading
and startup of the Linux operating system. This watchdog is implemented within the
BMC and uses BMC internal times. This watchdog has a configurable interval (up to 120
sec.) and can be enabled, disabled and kicked by the NPU using dedicated IPMI
commands.
• NPU reset by the BMC
• NPU watchdog reset
• Hardware watchdog in the CPLD
• Software watchdog on the BMC
A reset performed by the BMC, for example, a necessary reset during the CPLD
upgrade process.
An NPU reset by the watchdog mechanism in the aftermath of a software hang. To
capture this kind of NPU reboot, the BMC handles a special interrupt generated by
the NPU watchdog timer.
Figure 17
shows the watchdog timers used by the NPU.
Intel NetStructure
®
IXB2850 Packet Processing Boards
TPS
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