IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 204

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
A.2.56
A.2.57
Intel NetStructure
TPS
204
®
Example
ping -h 192.168.1.100 -n 100
post all
Perform and show the results of the Power On Self Test (POST) process. A hard-coded
sequence of POST tests is always performed when the board is booted up. This cannot
be change. This command allows the repetition of the initial POST for the board. Tests
performed by this command are:
Syntax
post all
post bmc
Perform IPMI Board Management Controller (BMC) communication tests. These tests
check for the presence of a BMC and reads the EEPROM device ID.
Syntax
post bmc -h | -a | {-f | -i | -s}
Parameters
• UART ports
• RDRAM/SDRAM
• QDR SRAM
• BBSRAM
• PCI bus
• BMC - ID EEPROMS using BMC communication paths
• Debug Ethernet port
• IXP28x0 microengines
• Media and backplane device
• Slow port bus
• Interrupt mechanisms
• XScale core
• Media Switch Fabric
• GPIO
• I
• LEDs
• IXF1104
• Telecom clock
• MB GBE
• -f - Check if the BMC is present on the board
• -i - Read the ID EEPROM from the board
• -s - BMC show ID EEPROM
• -a - Run all BMC tests
IXB2850 Packet Processing Boards
2
C bus
IXB2850—Boot Monitor Console Commands
Document Number: 05-2443-006
January 2007