PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 361

• Manufacturer Part Number: PEF20550HV2.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF20550HV2.1XT

• Lead Free Status / Rohs Status: Compliant

Upstream: initializing monitor and control time slot pair for IOM-2 channel 1
Write
Write
Write
Write
Write
6.1.3.3 CFI Activation
Write
Read
Write
Read
6.1.3.4 PCM Interface Activation
Write
Write
Write
6.1.3.5 Deactivating the OCTAT-P
To change the signalling for IOM-2 channel 0
Write
Write
Write
To change the signalling for IOM-2 channel 1
Write
Write
The line card is now completely initialized.
Semiconductor Group
MAAR = 98
MADR = FF
MACR = 78
MAAR = 99
MACR = 70
OMDR = CE
ISTA
CMDR = 10
STAR = 25
MADR = F0
MACR = 68
OMDR = EE
MAAR = 08
MADR = FF
MACR = 48
MAAR = 18
MACR = 48
= 48
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
upstream CM address: port 0, TS6
‘1111’ expected as C/I code (deactivate indication)
upper nibble: write CM data and code
lower nibble: set CM code for the upstream even address of
a decentral application
upstream CM address: port 0, TS7
upper nibble: write CM data and code
lower nibble: set CM code for the upstream odd address of a
decentral application
change to normal op mode; set CFI outputs to open drain
and activate them; enable monitor handshake
Interrupts: spurious C/I change due to CFI start-up; PCM
sync change
reset C/I FIFO (ignore spurious C/I change)
all in order and synchronized
upper nibble: don’t care
lower nibble: all bits set to high impedance
write MADR to all tristate memory locations
activate the PCM interface
downstream CM address: port 0, TS2
write ‘1111’ as C/I code (deactivate confirmation)
write to the CM data field
downstream CM address: port 0, TS6
write to the CM data field
361
Application Notes
PEB 20550
PEF 20550
01.96