PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 195

no-image

PEF20550HV2.1XT

Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF20550HV2.1XT

Lead Free Status / Rohs Status
Compliant
Two Groups
• Timing characteristics and
• Handling of special channels (C/I or signaling channel, monitor or feature control
The timing characteristics (data rate, clock rate, bit timing, etc. … ) are programmed in
the CFI registers (see chapter 5.2.2.2). The CFI data rate, for example, can be selected
between 128 kBit/s and 8192 kBit/s. This covers the standard IOM and SLD data rates
of 256, 512, 768 and 2048 kBit/s.
The special channels are initialized on a per timeslot basis in the control memory (CM).
This programming on a per timeslot basis allows a dedicated usage of each CFI port and
timeslot: an application that requires only two IOM-2 compatible layer-1 transceivers will
also only occupy 8 CFI timeslots (2 IOM channels) for that purpose. The remaining 24
timeslots can then be used for general switching applications or for the connection of non
IOM-2 compatible devices that require a special P handling.
The Special Channels can be Divided into Two Groups
• Monitor/Feature Control channels and
• Control/Signaling channels
In contrast to other Siemens telecom devices, the ELIC does not provide an ‘IOM mode’
or an ‘SLD mode’ that can be selected by programming a single ‘mode bit’. Instead, the
ELIC provides a configurable interface (CFI) that can be configured for a great variety of
interfaces, including IOM-1, multiplexed IOM-1, IOM-2 and SLD interfaces.
The Characteristics of the Different IOM
Semiconductor Group
channel)
195
®
and SLD Interfaces can be Divided into
Application Hints
PEB 20550
PEF 20550
01.96

Related parts for PEF20550HV2.1XT