PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 261

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PEF20550HV2.1XT

Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF20550HV2.1XT

Lead Free Status / Rohs Status
Compliant
8 bit timeslot:
32 kBit/s channel
32 kBit/s channel
16 kBit/s channel
16 kBit/s channel
16 kBit/s channel
16 kBit/s channel
5.4.1
All timeslot assignments are programmed in the control memory (CM). Each line
(address) of the CM refers to one CFI timeslot. The MAAR register, which is used to
address the CM, therefore specifies the CFI port and timeslot to be switched. The data
field of the CM contains a pointer which points to a location in the data memory (DM).
The data memory contains the actual PCM data to be switched. The MADR register
contains the data to be copied to the CM data field. Since this data is interpreted as a
pointer to the DM, the MADR contents therefore specifies the PCM port and timeslot to
be switched. The 4 bit CM code field must finally contain a value to declare the
corresponding CFI timeslot as a switched channel (codes with a leading 0). This code
must be written at least once to the CM using the MACR register.
Since the CFI - PCM timeslot assignment is programmed at the CFI side, it is possible
to switch a single downstream PCM timeslot to several downstream CFI timeslots. It is,
however, not possible to switch a single upstream CFI timeslot to several upstream PCM
timeslots.
If several upstream 64 kBit/s CFI timeslots are assigned to the same upstream 64 kBit/
s PCM timeslot, only the data of one CFI timeslot will be actually be switched since each
upstream connection will simply overwrite the DM data field. This switching mode can
therefore only effectively be used if the upstream switching is performed on different sub-
timeslot locations within the same PCM timeslot (refer to chapter 5.4.2).
The following sequences can be used to program, verify, and cancel a CFI - PCM
timeslot connection:
Semiconductor Group
CFI - PCM Timeslot Assignment
7
7
7
6
6
6
5
5
5
261
4
4
4
3
3
3
2
2
2
Application Hints
1
1
1
PEB 20550
PEF 20550
01.96
0
0
0

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