PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 320

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PEF20550HV2.1XT

Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF20550HV2.1XT

Lead Free Status / Rohs Status
Compliant
Figure 110
The value written to the downstream CM data field location is transmitted repeatedly in
every frame (CFI idle value) during the corresponding downstream CFI timeslot until a
new value is loaded or the ‘ P channel’ function is disabled. There are no interrupts
generated.
The upstream CM data field can be read at any time. The CM data field is updated in
every frame. The last value read represents the value received. There are no interrupts
generated.
For frame-synchronous exchange of data between the P and the CFI, the synchronous
transfer utility must be used (refer to chapter 5.7). Since this utility realizes the data
Semiconductor Group
P Access to the Upstream CFI Frame
MACR:
Up-
stream
1 1 0 0 1 0 0 0
CFI
Frame
0
127
1
Code Field
0
0
1
Control Memory
MADR:
Data Field
320
MAAR:
1
MA6
Application Hints
.
.
.
PEB 20550
PEF 20550
.
ITD08090
. MA0
01.96

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