PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 284

• Manufacturer Part Number: PEF20550HV2.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF20550HV2.1XT

• Lead Free Status / Rohs Status: Compliant

PEB 20550
PEF 20550
Application Hints
5.5
Preprocessed Channels
The configurable interface (CFI) is at first sight a timeslot oriented serial interface similar
to the PCM interface: a CFI frame contains a number of timeslots which can be switched
to the PCM interface. But in addition to the switching functions, the CFI timeslots can
also individually be configured as preprocessed channels. In this case, the contents of
a CFI timeslot are directly, or after an eventual preprocessing, exchanged with the P
interface. The main application is the realization of IOM (ISDN Oriented Modular) and
SLD (Subscriber Line Data) interfaces for the connection of subscriber circuits such as
layer-1 transceivers (ISDN line cards) or codec filter devices (analog line cards). Also
refer to chapter 5.1.1.
The preprocessing functions can be divided into 2 categories:
Monitor/Feature Control (MF) Channels
The monitor channel in IOM and the feature control channel in SLD applications are
handled by the MF handler. This MF handler consists of a 16 byte bidirectional FIFO
providing intermediate storage for the messages to be transmitted or received. Internal
microprograms can be executed in order to control the communication with the
connected subscriber circuit according to the IOM or SLD protocol. The exchange of
individual data is carried out with only one channel at a time. The MF handler must
therefore be pointed to that particular subscriber address (CFI timeslot).
Control/Signaling (CS) Channels
The access to the Command/Indication (C/I) channel of an IOM and to the signaling
(SIG) channel of an SLD interface is realized by reading or writing to the corresponding
control memory (CM) locations. In upstream direction, a change detection logic
supervises the received C/I or SIG values on all CS channels and reports all changes
via interrupt to the P.
The MF and CS channel functions are inseparably linked to each other such that an MF
channel must always be followed by a CS channel in the next following CFI timeslot. An
MF channel must furthermore, be located on an even CFI timeslot, the associated CS
channel must consequentially be always located on the following odd timeslot.
Semiconductor Group
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