FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 605

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

Table A-3. Intel
Intel
Mic. 2 Last Valid Index
Mic. 2 Status Register
Mic 2 Position In Current Buffer
Mic. 2 Prefetched Index Value
Mic. 2 Control Register
PCM In 2 Buffer Descriptor list
Base Address Register
PCM In 2 Current Index Value
PCM In 2 Last Valid Index
PCM In 2 Status Register
PCM In 2 Position In Current
Buffer
PCM In 2 Prefetched Index Value
PCM In 2 Control Register
S/PDIF Buffer Descriptor list
Base Address Register
S/PDIF Current Index Value
S/PDIF Last Valid Index
S/PDIF Status Register
S/PDIF Position In Current Buffer
S/PDIF Prefetched Index Value
S/PDIF Control Register
SDATA_IN Map Register
Modem In Buffer Descriptor List
Base Address Register
Modem In Current Index Value
Register
Modem In Last Valid Index
Register
Modem In Status Register
Modem In Position In Current
Buffer Register
Modem In Prefetch Index Value
Register
Modem In Control Register
Modem Out Buffer Descriptor List
Base Address Register
Modem Out Current Index Value
Register
®
82801DBM ICH4-M Datasheet
MBAR is set in Section 15.1.11, “MBAR—Modem Base Address Register (Modem—D31:F6)” on page 15-519
Register Name
®
ICH4 Variable I/O Registers (Sheet 5 of 6)
46–47h
48–49h
50–53h
56–57h
58–59h
66–67h
68–69h
Offset
60–63
AC’97 Modem I/O Registers at MBAR + Offset
4Ah
4Bh
5Ah
5Bh
6Ah
6Bh
0Ah
0Bh
45h
54h
55h
64h
65h
00h
04h
05h
06h
08h
10h
14h
80
Section 14.2.3, “x_LVI—Last Valid Index Register” on page 14-505
Section 14.2.4, “x_SR—Status Register” on page 14-506
Section 14.2.5, “x_PICB—Position In Current Buffer Register” on
page 14-507
Section 14.2.6, “x_PIV—Prefetched Index Value Register” on page 14-507
Section 14.2.7, “x_CR—Control Register” on page 14-508
Section 14.2.1, “x_BDBAR—Buffer Descriptor Base Address Register” on
page 14-504
Section 14.2.2, “x_CIV—Current Index Value Register” on page 14-505
Section 14.2.3, “x_LVI—Last Valid Index Register” on page 14-505
Section 14.2.4, “x_SR—Status Register” on page 14-506
Section 14.2.5, “x_PICB—Position In Current Buffer Register” on
page 14-507
Section 14.2.6, “x_PIV—Prefetched Index Value Register” on page 14-507
Section 14.2.7, “x_CR—Control Register” on page 14-508
Section 14.2.1, “x_BDBAR—Buffer Descriptor Base Address Register” on
page 14-504
Section 14.2.2, “x_CIV—Current Index Value Register” on page 14-505
Section 14.2.3, “x_LVI—Last Valid Index Register” on page 14-505
Section 14.2.4, “x_SR—Status Register” on page 14-506
Section 14.2.5, “x_PICB—Position In Current Buffer Register” on
page 14-507
Section 14.2.6, “x_PIV—Prefetched Index Value Register” on page 14-507
Section 14.2.7, “x_CR—Control Register” on page 14-508
Section 14.2.11, “SDM—SDATA_IN Map Register” on page 14-513
Section 15.2.1, “x_BDBAR—Buffer Descriptor List Base Address Register”
on page 15-525
Section 15.2.2, “x_CIV—Current Index Value Register” on page 15-525
Section 15.2.3, “x_LVI—Last Valid Index Register” on page 15-525
Section 15.2.4, “x_SR—Status Register” on page 15-526
Section 15.2.5, “x_PICB—Position in Current Buffer Register” on
page 15-527
Section 15.2.6, “x_PIV—Prefetch Index Value Register” on page 15-527
Section 15.2.7, “x_CR—Control Register” on page 15-528
Section 15.2.1, “x_BDBAR—Buffer Descriptor List Base Address Register”
on page 15-525
Section 15.2.2, “x_CIV—Current Index Value Register” on page 15-525
Datasheet Location
Register Index
605