FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 273
FW82801DBM S L6DN
Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet
1.FW82801DBM_S_L6DN.pdf
(615 pages)
Specifications of FW82801DBM S L6DN
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7.1.19
7.1.20
7.1.21
Intel
®
82801DBM ICH4-M Datasheet
MAX_LAT — Maximum Latency Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
CAP_ID — Capability ID Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
NXT_PTR — Next Item Pointer (LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
7:0
7:0
Bit
7:0
Bit
Bit
Capability ID (CAP_ID)
Controller supports PCI Power Management.
Next Item Pointer (NXT_PTR)
last item in the Capabilities list.
Maximum Latency (MAX_LAT) — RO. This field defines how often (in increments of 0.25 µ s) the
LAN Controller needs to access the PCI bus.
3Fh
38h
DCh
01h
DDh
00h
—
RO. Hardwired to 01h to indicate that the ICH4’s integrated LAN
—
RO. Hardwired to 00b to indicate that power management is the
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
RO
8 bits
RO
8 bits
RO
8 bits
273
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