FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 11

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

Intel
®
82801DBM ICH4-M Datasheet
5.18
5.19
5.17.2 Data Structures in Main Memory ....................................................210
5.17.3 USB 2.0 Enhanced Host Controller DMA .......................................210
5.17.4 Data Encoding and Bit Stuffing .......................................................213
5.17.5 Packet Formats...............................................................................213
5.17.6 USB EHCI Interrupts and Error Conditions.....................................214
5.17.7 USB EHCI Power Management......................................................214
5.17.8 Interaction with Classic Host Controllers ........................................216
5.17.9 USB 2.0 Legacy Keyboard Operation.............................................219
5.17.10 USB 2.0 EHCI Based Debug Port...................................................220
SMBus Controller Functional Description (D31:F3) .....................................225
5.18.1 Host Controller ................................................................................225
5.18.2 Bus Arbitration ................................................................................235
5.18.3 Bus Timing ......................................................................................235
5.18.4 Interrupts / SMI# .............................................................................236
5.18.5 SMBALERT#...................................................................................237
5.18.6 SMBus CRC Generation and Checking..........................................237
5.18.7 SMBus Slave Interface ...................................................................237
AC ’97 Controller Functional Description (Audio D31:F5, Modem D31:F6).242
5.19.1 PCI Power Management.................................................................244
5.19.2 AC-Link Overview ...........................................................................245
5.17.3.1 Periodic List Execution ....................................................211
5.17.3.2 Asynchronous List Execution ..........................................212
5.17.6.1 Aborts on USB EHCI-Initiated Memory Reads ................214
5.17.7.1 Pause Feature .................................................................214
5.17.7.2 Suspend Feature .............................................................215
5.17.7.3 ACPI Device States .........................................................215
5.17.7.4 ACPI System States ........................................................216
5.17.7.5 Mobile Considerations .....................................................216
5.17.8.1 Port-Routing Logic...........................................................217
5.17.8.2 Device Connects .............................................................218
5.17.8.3 Device Disconnects .........................................................218
5.17.8.4 Effect of Resets on Port-Routing Logic ...........................219
5.17.10.1 Theory of Operation........................................................220
5.18.1.1 Command Protocols ........................................................226
5.18.1.2 I
5.18.1.3 Heartbeat for Use with the External LAN Controller ........235
5.18.3.1 Clock Stretching ..............................................................235
5.18.3.2 Bus Time Out (ICH4 as SMBus Master)..........................235
5.18.7.1 Format of Slave Write Cycle............................................238
5.18.7.2 Format of Read Command ..............................................239
5.18.7.3 Format of Host Notify Command .....................................241
5.19.2.1 AC-link Output Frame (SDOUT)......................................247
5.19.2.2 Output Slot 0: Tag Phase ................................................247
5.19.2.3 Output Slot 1: Command Address Port ...........................248
5.19.2.4 Output Slot 2: Command Data Port.................................248
5.19.2.5 Output Slot 3: PCM Playback Left Channel.....................248
5.19.2.6 Output Slot 4: PCM Playback Right Channel ..................248
5.19.2.7 Output Slot 5: Modem Codec ..........................................248
5.19.2.8 Output Slot 6: PCM Playback Center Front Channel ......248
5.19.2.9 Output Slots 7-8: PCM Playback Left and Right Rear
5.19.2.10 Output Slot 9: Playback Sub Woofer Channel.................249
5.19.2.11 Output Slots 10-11: Reserved .........................................249
Channels .........................................................................249
2
C Behavior ....................................................................234
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