FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 314
FW82801DBM S L6DN
Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet
1.FW82801DBM_S_L6DN.pdf
(615 pages)
Specifications of FW82801DBM S L6DN
Lead Free Status / RoHS Status
Not Compliant
- Current page: 314 of 615
- Download datasheet (16Mb)
LPC Interface Bridge Registers (D31:F0)
9.1.19
.
9.1.20
314
D31_ERR_CFG—Device 31 Error Configuration Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
This register configures the ICH4’s Device 31 responses to various system errors. The actual
assertion of SERR# is enabled via the PCI Command register
D31_ERR_STS—Device 31 Error Status Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
This register configures the ICH4’s Device 31 responses to various system errors. The actual
assertion of SERR# is enabled via the PCI Command register.
7:3
Bit
Bit
7:3
2
1
0
2
1
0
Reserved
SERR# on Received Target Abort Enable (SERR_RTA_EN) — R/W.
0 = Disable. No SERR# assertion on Received Target Abort.
1 = The ICH4 will generate SERR# when SERR_RTA is set if SERR_EN is set.
SERR# on Delayed Transaction Timeout Enable (SERR_DTT_EN) — R/W.
0 = Disable. No SERR# assertion on Delayed Transaction Timeout.
1 = The ICH4 will generate SERR# when SERR_DTT bit is set if SERR_EN is set.
Reserved
Reserved
SERR# Due to Received Target Abort (SERR_RTA) — R/WC.
0 = Software clears this bit by writing a 1 to the bit location.
1 = The ICH4 sets this bit when it receives a target abort. If SERR_EN, the ICH4 will also generate
SERR# Due to Delayed Transaction Timeout (SERR_DTT) — R/WC.
0 = Software clears this bit by writing a 1 to the bit location.
1 = When a PCI master does not return for the data within 1 ms of the cycle’s completion, the ICH4
Reserved
an SERR# when SERR_RTA is set.
clears the delayed transaction and sets this bit. If both SERR_DTT_EN and SERR_EN are set,
then ICH4 will also generate an SERR# when SERR_DTT is set.
88h
00h
No
8Ah
00h
No
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Intel
®
82801DBM ICH4-M Datasheet
R/W
8 bit
Core
R/WC
8 bit
Core
Related parts for FW82801DBM S L6DN
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
I/O Controller Hub 4 Mobile
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Intel
Datasheet:
Part Number:
Description:
Manufacturer:
Intel
Datasheet:
Part Number:
Description:
Microprocessor: Intel Celeron M Processor 320 and Ultra Low Voltage Intel Celeron M Processor at 600MHz
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 82550 Fast Ethernet Multifunction PCI/CardBus Controller
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 64 Mbit. Access speed 150 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 100 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
DA28F640J5A-1505 Volt Intel StrataFlash Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 6300ESB I/O Controller Hub
Manufacturer:
Intel Corporation
Datasheet: