FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 394

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
9.9.8
9.9.9
394
TCO2_CNT—TCO2 Control Register
I/O Address:
Default Value:
Lockable:
TCO_MESSAGE1 and TCO_MESSAGE2 Registers
I/O Address:
Default Value:
Lockable:
15:4
Bit
2:1
3
0
7:0
Bit
Reserved
GPIO11_ALERT_DISABLE — R/W. At reset (via RSMRST# asserted) this bit is set and GPIO[11]
alerts are disabled.
0 = Enable.
1 = Disable GPIO11/SMBALERT# as an alert source for the heartbeats and the SMBus slave.
INTRD_SEL — R/W. Selects the action to take if the INTRUDER# signal goes active.
00 = No interrupt or SMI#
01 = Interrupt (as selected by TCO_INT_SEL).
10 = SMI
11 = Reserved
Reserved
TCO_MESSAGE[n] — R/W.The value written into this register will be sent out via the SMLINK
interface in the MESSAGE field of the Alert On LAN message. BIOS can write to this register to
indicate its boot progress which can be monitored externally.
No
No
TCOBASE +0Ah
0008h
TCOBASE +0Ch (Message 1) Attribute:
TCOBASE +0Dh (Message 2)
00h
Description
Description
Attribute:
Size:
Power Well:
Size:
Power Well:
Intel
®
82801DBM ICH4-M Datasheet
R/W
16 bit
Resume
R/W
8 bit
Resume