FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 160
FW82801DBM S L6DN
Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet
1.FW82801DBM_S_L6DN.pdf
(615 pages)
Specifications of FW82801DBM S L6DN
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Functional Description
5.12.11.1
160
Table 5-45. Write Only Registers with Read Paths in ALT Access Mode (Sheet 1 of 2)
Addr
00h
01h
02h
03h
04h
05h
I/O
After getting control in step #3, if the OS does not reprogram the system timer again, the timer
ticks may be happening faster than expected. For example DOS and its associated software assume
that the system timer is running at 54.6 ms and as a result the timeouts in the software may be
happening faster than expected.
Operating systems (e.g., Windows* 98, Windows* 2000 and Windows NT*) reprogram the system
timer and, therefore, will not run into this problem.
For other operating systems (e.g., DOS) the BIOS should restore the timer back to 54.6 ms before
passing control to the OS. If the BIOS is entering ALT access mode before entering the suspend
state it is not necessary to restore the timer contents after the exit from ALT access mode.
Write Only Registers with Read Paths in ALT Access Mode
The registers described in
field in the table indicates which register will be returned per access to that port.
•
•
•
Rds
# of
BIOS enters ALT access mode for reading the ICH4 timer related registers.
BIOS exits ALT access mode.
BIOS continues through the execution of other needed steps and passes control to the OS.
2
2
2
2
2
2
Access
2
1
2
1
2
1
2
1
2
1
2
1
Restore Data
DMA Chan 0 base address
low byte
DMA Chan 0 base address
high byte
DMA Chan 0 base count low
byte
DMA Chan 0 base count high
byte
DMA Chan 1 base address
low byte
DMA Chan 1 base address
high byte
DMA Chan 1 base count low
byte
DMA Chan 1 base count high
byte
DMA Chan 2 base address
low byte
DMA Chan 2 base address
high byte
DMA Chan 2 base count low
byte
DMA Chan 2 base count high
byte
Table 5-45
Data
have read paths in ALT access mode. The access number
Addr
C4h
40h
41h
42h
70h
I/O
Rds
# of
7
1
1
1
2
Access
Intel
1
2
3
4
5
6
7
1
2
Restore Data
®
82801DBM ICH4-M Datasheet
Timer Counter 0 status, bits
[5:0]
Timer Counter 0 base count low
byte
Timer Counter 0 base count
high byte
Timer Counter 1 base count low
byte
Timer Counter 1 base count
high byte
Timer Counter 2 base count low
byte
Timer Counter 2 base count
high byte
Timer Counter 1 status, bits
[5:0]
Timer Counter 2 status, bits
[5:0]
Bit 7 = NMI Enable,
Bits [6:0] = RTC Address
DMA Chan 5 base address low
byte
DMA Chan 5 base address high
byte
Data
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