FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 406
FW82801DBM S L6DN
Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet
1.FW82801DBM_S_L6DN.pdf
(615 pages)
Specifications of FW82801DBM S L6DN
Lead Free Status / RoHS Status
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IDE Controller Registers (D31:F1)
10.1.12
10.1.13
10.1.14
406
SCMD_BAR—Secondary Command Block Base Address
Register (IDE D31:F1)
Address Offset:
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command Block.
SCNL_BAR—Secondary Control Block Base Address
Register (IDE D31:F1)
Address Offset:
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command Block.
BM_BASE — Bus Master Base Address Register
(IDE—D31:F1)
Address Offset:
Default Value:
The Bus Master IDE interface function uses Base Address register 5 to request a 16-byte I/O space
to provide a software interface to the Bus Master functions. Only 12 bytes are actually used
(6 bytes for primary, 6 bytes for secondary). Only bits [15:4] are used to decode the address.
31:16
31:16
31:16
15:3
15:2
15:4
2:1
3:1
Bit
Bit
Bit
0
1
0
0
Reserved
Base Address — R/W. Base address of the I/O space (8 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. This bit is set to one, indicating a request for I/O space.
Reserved
Base Address — R/W. Base address of the I/O space (4 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. This bit is set to one, indicating a request for I/O space.
Reserved
Base Address — R/W. Base address of the I/O space (16 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1, indicating a request for I/O space.
20h
00000001h
18h
00000001h
1Ch
00000001h
–
–
–
1Bh
23h
1Fh
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Intel
R/W
32 bits
R/W
32 bits
R/W
32 bits
®
82801DBM ICH4-M Datasheet
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