FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 553

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

Intel
®
Table 17-11. Ultra ATA Timing (Mode 0, Mode 1, Mode 2)
82801DBM ICH4-M Datasheet
Sym
t83a
t83b
t84a
t84b
t85a
t85b
t86a
t86b
t92a
t80
t81
t82
t87
t88
t89
t90
t91
Sustained Cycle Time
(T2cyctyp)
Cycle Time (Tcyc)
Two Cycle Time (T2cyc)
Data Setup Time (Tds)
Recipient IC data setup time
(from data valid until
STROBE edge) (see Note 2)
(Tdsic)
Data Hold Time (Tdh)
Recipient IC data hold time
(from STROBE edge until
data may become invalid)
(see Note 2) (Tdhic)
Data Valid Setup Time
(Tdvs)
Sender IC data valid setup
time (from data valid until
STROBE edge) (see Note 2)
(Tdvsic)
Data Valid Hold Time (Tdvh)
Sender IC data valid hold
time (from STROBE edge
until data may become
invalid) (see Note 2) (Tdvhic)
Limited Interlock Time (Tli)
Interlock Time w/ Minimum
(Tmli)
Envelope Time (Tenv)
Ready to Pause Time (Trp)
DMACK setup/hold Time
(Tack)
CRC Word Setup Time at
Host (Tcvs)
Parameter (1)
Mode 0 (ns)
14.7
72.9
Min
112
230
160
4.8
6.2
15
70
20
20
20
70
5
9
0
240
Max
150
70
Mode 1 (ns)
50.9
Min
153
125
9.7
4.8
6.2
73
10
48
20
20
20
48
5
9
0
160
Max
150
70
Mode 2 (ns)
33.9
Min
115
100
6.8
4.8
6.2
54
31
20
20
20
31
7
5
9
0
120
Electrical Characteristics
Max
150
70
Sender
Connector
End
Recipient
Connector
Sender
Connector
Recipient
Connector
ICH4 ball
Recipient
Connector
ICH4 ball
Sender
Connector
ICH4 ball
Sender
Connector
ICH4 ball
See Note 2
Host
Connector
Host
Connector
Recipient
Connector
Host
Connector
Host
Connector
Measuring
Location
Figure
17-11
Figure
17-11
Figure
17-11
Figure
17-11
Figure
17-11
Figure
17-11
Figure
17-13
Figure
17-13
Figure
17-10
Figure
17-12
Figure
17-10,
Figure
17-13
Figure
553