EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 486
![32-Bit Microcontroller IC](/photos/12/23/122383/mfg_ep9301_parts_sml.jpg)
EP9301-IQZ
Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9301-IQZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1250
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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12
12-8
Static Memory Controller
EP93xx User’s Guide
12.4 PC Card Memory-Mode Enable Signals
12.5 PC Card Memory Mapping
PC Card memory-mode enable signals, nPC_CE1 and nPC_CE2, are output on pin MCELn
and pin MCEHn, respectively. Along with the address signal output on pin AD[0] and the data
signals input or output on pins DA[15:8] and DA[7:0], the nPC_CE1 and nPC_CE2 signals
specify the type of access that is being made to the particular segment of memory in the PC
Card, as shown in
The address mapping for access to an 8- or 16-bit PC Card is shown in
Table
Note: Prior to version 8.0 of the PCMCIA specification, two valid types of odd-byte accesses to a
Note: It is up to the programmer to provide an even address for all attribute memory access
Note: In
12-7, respectively.
16-bit PC Card were defined as shown in
odd-byte access to 16-bit PC Cards.
operations (see PCMCIA Spec. 2.1), because the PCMCIA controller will generate the
physical address as shown in
significant address bit is 0b1 or 0b0.
0b1, 0b0, or 0bx. [25:2] refers to bit positions of the address, not address values.
Table 12-6
Type 1 - Odd-Byte Access
Type 2 - Odd-Byte Access
Stand by (no access)
Stand by (no access)
Even Byte Access
Even Byte Access
Both Byte Access
Odd Byte Access
Odd Byte Access
Access
Access
Access
Table 12-3
and
Table
and
Table 12-4. Supported 16-Bit Accesses
Copyright 2007 Cirrus Logic
Table 12-3. Supported 8-Bit Accesses
12-7, bit 1 and bit 0 of the address each show a value of
Table 12-5. PCMCIA Legacy Usage
nPC_CE2
nPC_CE2
Table 12-6
Table
nPC_CE2
1
1
1
0
1
0
1
0
1
12-4.
Table
and
nPC_CE1
nPC_CE1
nPC_CE1
Table 12-7
1
0
0
0
1
0
0
12-5. The SMC does not support Type 1
1
0
A0
A0
X
0
1
Z
, regardless of whether the least
X
0
1
A0
1
1
Odd Byte
D15-D8
D15-D8
Odd-Byte
D15-D8
Z
Z
Z
Z
Z
Z
Z
Table 12-6
Even Byte
Even Byte
Even Byte
Odd Byte
Odd Byte
Odd-Byte
D7-D0
D7-D0
D7-D0
Z
Z
Z
and
DS785UM1
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