EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 206
![32-Bit Microcontroller IC](/photos/12/23/122383/mfg_ep9301_parts_sml.jpg)
EP9301-IQZ
Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9301-IQZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1250
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 206 of 824
- Download datasheet (13Mb)
7
7-24
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7.4.9 Hardware Cursor
Frame
D18
Ctr
0
Assuming that the 3-bit input pattern that represents this 33% duty cycle grayscale is 0x2 or
010b, the values in
table. In this mode, the X locations are ignored by the grayscale generation.
The raster engine provides support for a hardware cursor. The hardware cursor has a
separate bus mastering interface that allows it’s image to be stored anywhere in memory.
Software provides a location start, reset, size, X and Y position, and two cursor colors. The
hardware loads a line at a time from memory and multiplexes the video stream data based on
the cursor values. The X and Y locations are compared to the horizontal and vertical counters
and trigger the state machine to enable the cursor output overlay.
Vert
D17
Ctr
0
Horz
D16
Ctr
0
VCNT (lines)
Table 7-9. Programming 33% Duty Cycle into the Lookup Table
base + 0x08
base + 0x28
base + 0x48
base + 0x68
Register
address
(pixels)
HCNT
Table 7-9
Frame 0
Frame 2
V
E
R
T
Figure 7-8. Three and Four Count Axis
1
1
1
1
D
1
5
X
X
X
X
are used to program this pattern into the grayscale look-up-
Copyright 2007 Cirrus Logic
1
1
1
0
D
1
4
X
X
X
X
1
1
0
1
D
1
3
X
X
X
X
H O R Z
1
0
0
0
1
1
1
1
0
0
D
1
2
X
X
X
X
0
0
1
0
0
0
1
0
1
1
D
1
1
0
1
0
X
0
1
0
1
0
0
1
0
1
0
D
1
0
0
1
0
X
0
1
0
1
1
0
1
0
0
1
D
9
1
0
0
X
1
0
0
0
D
8
0
0
1
X
Frame 1
0
1
1
1
D
7
1
0
1
X
0
1
1
0
D
6
1
0
0
X
0
1
0
1
D
5
0
1
0
X
0
1
0
0
D
4
0
0
1
X
0
0
0
0
0
1
1
D
3
0
0
1
X
1
1
0
0
0
1
0
D
2
0
0
1
X
0
0
1
0
0
0
1
D
1
0
1
0
X
0
0
1
0
0
0
0
D
0
1
0
0
X
GrySclLUT
Address *4
Frame
00
01
10
11
DS785UM1
Value
Pixel
010
010
010
010
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