EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 280
![32-Bit Microcontroller IC](/photos/12/23/122383/mfg_ep9301_parts_sml.jpg)
EP9301-IQZ
Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9301-IQZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1250
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 280 of 824
- Download datasheet (13Mb)
8
8-16
Graphics Accelerator
EP93xx User’s Guide
8.6.3 Block Fill Function
The following sequence describes how to carry out a Block Fill function:
5. Write the word-aligned value of the SDRAM address ‘for the beginning of the line draw’
6. Write the desired background color value to the BG field in the
7. Write the desired foreground color value to the MASK field in the
8. Write YINC = 0xFFF and XINC = 0x49C to the
9. Write WIDTH = 0x50 to the “BLKDESTWIDTH”:register, where
10. Write HEIGHT = 0x0 to the
11. Clear the
12.Write Line = ‘1’, DXDIR = ‘0’, DYDIR = ‘0’, BG = ‘0’, P = 0x4, and INTEN = ‘1’ to the
13.Write EN = ‘1’ to the
14.Wait for an interrupt or poll for EN = ‘0’ in the
1. Setup BLOCKMASK Register
2. Setup DESTPIXELSTRT Register
to the
register. The ‘off’ pattern bits of the line will be displayed using the background color.
register. The ‘on’ pattern bits of the line will be displayed using the foreground color.
“BLOCKCTRL”
becomes cleared to ‘0’, the Breshenham’s Algorithm line draw function is complete.
[101% 2] x 8 = 1 x 8 = 8 = 0x8, and
2] x 8 = 0 x 0 = 0 = 0x0
(81 / 281) x 4095 = 1180.409, which rounds to 1180 = 0x49C
80 = 0x50
0.0686 = 0x0
pixel-fill value is dependant on the color depth.
register.
SPEL = [X2% 2 (pixel depth / 8-bit byte)] x 8 = [101% 2 (16-bits / 8-bits)] x 8-bits =
EPEL = [X1% 2 (pixel depth / 8-bit byte)] x 8 = [20% 2 (16-bits / 8-bits)] x 8-bits = [20%
YINC = 4095 = 0xFFF
XINC = [abs(X2 - X1) / abs(Y2 - Y1)] x 4095 = [abs(20 - 101) / abs(20-301)] x 4095 =
WIDTH = abs(X2 - X1)% 4096 - 1 = abs(20 - 101)% 4096 - 1 = 81% 4096 - 1 = 81 - 1 =
HEIGHT = [abs(Y2 - Y1) - 1] / 4096 = [abs(20 - 301) - 1]/ 4096 = (281 - 1) / 4096 =
Write the desired pixel-fill value to the MASK field in the
Write the desired values to the SPEL field and the EPEL field in the
“BLKDESTSTRT”
“BLOCKCTRL”
register
“BLOCKCTRL”
register.
Copyright 2007 Cirrus Logic
register by writing 0x0000_0000 to it
“BLKDESTHEIGHT”
register
“BLOCKCTRL”
“LINEINC”
register, where
“BLOCKMASK”
register, where
register. When the EN bit
“BACKGROUND”
“BLOCKMASK”
“DESTPIXELSTRT”
register. The
DS785UM1
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