EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 110

• Manufacturer Part Number: EP9301-IQZ
• Description: 32-Bit Microcontroller IC
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9301-IQZ

• Controller Family/series: (ARM9)
• Core Size: 32 Bit
• A/d Converter: 12 Bits
• Supply Voltage: 3.3V
• No. Of I/o Pins: 24
• Mounting Type: Surface Mount
• Operating Temperature Min: -40°C
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1250

3
3-40
MaverickCrunch Co-Processor
EP93xx User’s Guide
31:28
31:28
31:28
cond
cond
cond
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
1 1 1 0
1 1 1 0
1 1 1 0
27:24
27:24
27:24
Double Precision Floating Point Add
Single Precision Floating Point Subtract
Double Precision Floating Point Subtract
Adds two double precision floating point numbers.
CFADDD<cond> CRd, CRn, CRm
CRd:
CRn:
CRm:
Subtracts two single precision floating point numbers:
CFSUBS<cond> CRd, CRn, CRm
CRd:
CRn:
CRm:
Subtracts two double precision floating point numbers.
CFSUBD<cond> CRd, CRn, CRm
CRd:
CRn:
CRm:
CRd = CRn - CRm
23:22
23:22
23:22
0 0
0 0
0 0
21:20
21:20
21:20
1 1
1 1
1 1
Copyright 2007 Cirrus Logic
Destination register
Addend register
Addend register
Destination register
Minuend register
Subtrahend register
Destination register
Minuend register
Subtrahend register
19:16
19:16
19:16
CRn
CRn
CRn
15:12
15:12
15:12
CRd
CRd
CRd
0 1 0 0
0 1 0 0
0 1 0 0
11:8
11:8
11:8
1 0 1
1 1 0
1 1 1
7:5
7:5
7:5
4
4
4
0
0
0
DS785UM1
CRm
CRm
CRm
3:0
3:0
3:0