EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 279
![32-Bit Microcontroller IC](/photos/12/23/122383/mfg_ep9301_parts_sml.jpg)
EP9301-IQZ
Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9301-IQZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1250
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 279 of 824
- Download datasheet (13Mb)
DS785UM1
8.6.2 Example of Breshenham’s Algorithm Line Draw
The final step is to wait for an interrupt or poll for EN = ‘0’ in the BLOCKCTRL register. When
the EN bit becomes cleared to ‘0’, the line draw function is complete.
To achieve the following display and pattern, follow Steps 1 to 14 in this section.
The following sequence describes how to set up those registers that are used for a
Breshenham’s algorithm line draw.
9. Setup BLKDESTWIDTH Register
10.Setup BLKDESTHEIGHT Register
11.Setup BLOCKCTRL Register
1. Write XINIT = 0x800 (2048) and YINIT = 0x800 to the
2. Write PTTN = 0x00FF and CNT = 0xF to the
3. Write LEN = 0x140 to the
4. Write SPEL = 0x8 and EPEL = 0x0 to the
• Display size is 640 x 480 x 16-bits per pixel
• Display memory starts at physical location 0x0000_0000
• Pattern is 8 transparent pixels and 8 white pixels
• X2 = 20, X1 = 101
• Y2 = 20, Y1 = 301
(1 / # of 16-bit pixels in word) = 640 x 1/2 = 320 = 0x140
register.
register.
Write ‘abs(X2 -X1) modulo 4096, minus 1’ to the WIDTH field in the
Write ‘abs(Y2 - Y1) / 4096, minus 1’ to the HEIGHT field in the
A. Clear the
B. Set the LINE bit to ‘1’
C. If X2 > X1, set the DXDIR bit to ‘1’, else set the DXDIR bit to ‘0’
D. If Y2 > Y1, set the DYDIR bit to ‘1’, else set the DYDIR bit to ‘0’
E. Either set the BG bit to ‘1’ to use the background color specified in
F. Set the P bits to the value for the desired BPP color depth
G. If interrupts are desired, set the INTEN bit to ‘1’
H. Set the EN bit to ‘1’
register or set the BG bit to ‘0’ for transparent background.
“BLOCKCTRL”
Copyright 2007 Cirrus Logic
“DESTLINELENGTH”
register by writing 0x0000_0000 to it.
“DESTPIXELSTRT”
“LINEPATTRN”
register, where LEN = 640 (pixels) x 1/2
“LINEINIT”
register
register, where:
“BLKDESTHEIGHT”
register
“BLKDESTWIDTH”
Graphics Accelerator
EP93xx User’s Guide
“BACKGROUND”
8-15
8
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