ATMEGA128RZBV-8AU Atmel, ATMEGA128RZBV-8AU Datasheet - Page 93
ATMEGA128RZBV-8AU
Manufacturer Part Number
ATMEGA128RZBV-8AU
Description
MCU ATMEGA1280/AT86RF230 100TQFP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA640V-8CU.pdf
(38 pages)
2.ATMEGA640V-8CU.pdf
(444 pages)
3.AT86RF230-ZU.pdf
(98 pages)
Specifications of ATMEGA128RZBV-8AU
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
100-TQFP
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega128
- Current page: 93 of 444
- Download datasheet (10Mb)
2549M–AVR–09/10
• OC4B – Port H, Bit 4
OC4B, Output Compare Match B output: The PH4 pin can serve as an external output for the
Timer/Counter2 Output Compare B. The pin has to be configured as an output (DDH4 set) to
serve this function. The OC4B pin is also the output pin for the PWM mode timer function.
• OC4A – Port H, Bit 3
OC4C, Output Compare Match A output: The PH3 pin can serve as an external output for the
Timer/Counter4 Output Compare A. The pin has to be configured as an output (DDH3 set) to
serve this function. The OC4A pin is also the output pin for the PWM mode timer function.
• XCK2 – Port H, Bit 2
XCK2, USART2 External Clock: The Data Direction Register (DDH2) controls whether the clock
is output (DDH2 set) or input (DDH2 cleared). The XC2K pin is active only when the USART2
operates in synchronous mode.
• TXD2 – Port H, Bit 1
TXD2, USART2 Transmit Pin.
• RXD2 – Port H, Bit 0
RXD2, USART2 Receive pin: Receive Data (Data input pin for the USART2). When the
USART2 Receiver is enabled, this pin is configured as an input regardless of the value of DDH0.
When the USART2 forces this pin to be an input, a logical on in PORTH0 will turn on the internal
pull-up.
Table 12-25. Overriding Signals for Alternate Functions in PH7:PH4
Signal Name
DIEOE
DIEOV
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
AIO
DI
T4 INPUT
PH7/T4
0
0
0
0
0
0
–
0
0
–
ATmega640/1280/1281/2560/2561
OC2B ENABLE
PH6/OC2B
OC2B
0
0
0
0
–
0
0
0
–
OC4C ENABLE
PH5/OC4C
OC4C
0
0
0
0
–
0
0
0
–
OC4B ENABLE
PH4/OC4B
OC4B
0
0
0
0
–
0
0
0
–
93
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