ATMEGA128RZBV-8AU Atmel, ATMEGA128RZBV-8AU Datasheet - Page 55

• Manufacturer Part Number: ATMEGA128RZBV-8AU
• Description: MCU ATMEGA1280/AT86RF230 100TQFP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RZBV-8AU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 100-TQFP
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega128

10.9.3
10.9.4
10.9.5
10.9.6
10.9.7
2549M–AVR–09/10
Brown-out Detector
Internal Voltage Reference
Watchdog Timer
Port Pins
On-chip Debug System
to use the Internal Voltage Reference as input, the Analog Comparator should be disabled in all
sleep modes. Otherwise, the Internal Voltage Reference will be enabled, independent of sleep
mode. Refer to
log Comparator.
If the Brown-out Detector is not needed by the application, this module should be turned off. If
the Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep
modes, and hence, always consume power. In the deeper sleep modes, this will contribute sig-
nificantly to the total current consumption. Refer to
on how to configure the Brown-out Detector.
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power. When
turned on again, the user must allow the reference to start up before the output is used. If the
reference is kept on in sleep mode, the output can be used immediately. Refer to
age Reference” on page 62
If the Watchdog Timer is not needed in the application, the module should be turned off. If the
Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. Refer to
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important is then to ensure that no pins drive resistive loads. In sleep modes where both
the I/O clock (clk
be disabled. This ensures that no power is consumed by the input logic when not needed. In
some cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. Refer to the section
which pins are enabled. If the input buffer is enabled and the input signal is left floating or have
an analog signal level close to V
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR2, DIDR1
and DIDR0). Refer to
Input Disable Register 1” on page 274
295
If the On-chip debug system is enabled by the OCDEN Fuse and the chip enters sleep mode,
the main clock source is enabled, and hence, always consumes power. In the deeper sleep
modes, this will contribute significantly to the total current consumption.
for details.
“Interrupts” on page 105
“AC – Analog Comparator” on page 271
CC
I/O
/2 on an input pin can cause significant current even in active mode. Digital
) and the ADC clock (clk
“DIDR2 – Digital Input Disable Register 2” on page
for details on the start-up time.
“Digital Input Enable and Sleep Modes” on page 74
ATmega640/1280/1281/2560/2561
CC
/2, the input buffer will use excessive power.
for details on how to configure the Watchdog Timer.
and
ADC
“DIDR0 – Digital Input Disable Register 0” on page
) are stopped, the input buffers of the device will
“Brown-out Detection” on page 61
for details on how to configure the Ana-
295,
“DIDR1 – Digital
“Internal Volt-
for details on
for details
55