ATMEGA128RZBV-8AU Atmel, ATMEGA128RZBV-8AU Datasheet - Page 276

MCU ATMEGA1280/AT86RF230 100TQFP

ATMEGA128RZBV-8AU

Manufacturer Part Number
ATMEGA128RZBV-8AU
Description
MCU ATMEGA1280/AT86RF230 100TQFP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA128RZBV-8AU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
100-TQFP
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega128
Figure 25-1. Analog to Digital Converter Block Schematic
25.2
2549M–AVR–09/10
ADC[15:0]
BANDGAP (1.1V)
REFERENCE
REFERENCE
(1.1V/2.56V)
INTERNAL
AVCC
AREF
GND
8-BIT DATABUS
Operation
ADC[2:0]
ADC[10:8]
ADC MULTIPLEXER
SELECT (ADMUX)
The ADC converts an analog input voltage to a 10-bit digital value through successive approxi-
mation. The minimum value represents GND and the maximum value represents the voltage on
the AREF pin minus 1 LSB. Optionally, AVCC or an internal 1.1V or 2.56V reference voltage
may be connected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The
internal voltage reference may thus be decoupled by an external capacitor at the AREF pin to
improve noise immunity.
The analog input channel is selected by writing to the MUX bits in ADMUX and ADCSRB. Any of
the ADC input pins, as well as GND and a fixed bandgap voltage reference, can be selected as
single ended inputs to the ADC. A selection of ADC input pins can be selected as positive and
negative inputs to the differential amplifier.
MUX DECODER
+
-
REGISTER B (ADCSRB)
ADC CTRL & STATUS
AMPLIFIE R
GAIN
ATmega640/1280/1281/2560/2561
10-bit DAC
REGISTER A (ADCSRA)
ADC CTRL & STATUS
ADC CONVERSION
COMPLETE IRQ
PRESCALER
CONVERSION LOGIC
+
-
ADTS[2:0]
START
TRIGGER
SELECT
SAMPLE & HOLD
INTERRUPT
COMPARATOR
ADC
MULTIPLEXER
OUTPUT
FLAGS
15
ADC DATA REGISTER
(ADCH/ADCL)
0
276

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