ATMEGA128RZBV-8AU Atmel, ATMEGA128RZBV-8AU Datasheet - Page 174

• Manufacturer Part Number: ATMEGA128RZBV-8AU
• Description: MCU ATMEGA1280/AT86RF230 100TQFP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RZBV-8AU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 100-TQFP
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega128

19. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
19.1
2549M–AVR–09/10
Overview
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. The main
features are:
•
•
•
•
•
•
•
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 16-12. For the actual
placement of I/O pins, see
ing I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations
are listed in the
The Power Reduction Timer/Counter2 bit, PRTIM2, in
page 56
Figure 19-1. 8-bit Timer/Counter Block Diagram
Single Channel Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV2, OCF2A and OCF2B)
Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
Status flags
must be written to zero to enable Timer/Counter2 module.
Timer/Counter
TCCRnA
OCRnA
TCNTn
“Register Description” on page
OCRnB
=
=
Direction
“Pin Configurations” on page
Count
Clear
ASSRn
Synchronized Status flags
ATmega640/1280/1281/2560/2561
Control Logic
TOP
=
TCCRnB
asynchronous mode
Value
BOTTOM
Fixed
TOP
select (ASn)
clk
=
Tn
0
187.
Prescaler
Synchronization Unit
“PRR0 – Power Reduction Register 0” on
2. CPU accessible I/O Registers, includ-
OCnA
(Int.Req.)
OCnB
(Int.Req.)
Generation
Generation
Waveform
Waveform
TOVn
(Int.Req.)
OCnA
OCnB
Oscillator
T/C
clk
I/O
clk
clk
I/O
ASY
TOSC1
TOSC2
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