ATMEGA128RZBV-8AU Atmel, ATMEGA128RZBV-8AU Datasheet - Page 263

• Manufacturer Part Number: ATMEGA128RZBV-8AU
• Description: MCU ATMEGA1280/AT86RF230 100TQFP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RZBV-8AU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 100-TQFP
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega128

Table 23-5.
2549M–AVR–09/10
Status Code
(TWSR)
Prescaler Bits
are 0
0xA8
0xB0
0xB8
0xC0
0xC8
Status of the 2-wire Serial Bus and
2-wire Serial Interface Hardware
Own SLA+R has been received;
ACK has been returned
Arbitration lost in SLA+R/W as
Master; own SLA+R has been
received; ACK has been returned
Data byte in TWDR has been
transmitted; ACK has been
received
Data byte in TWDR has been
transmitted; NOT ACK has been
received
Last data byte in TWDR has been
transmitted (TWEA = “0”); ACK
has been received
Status Codes for Slave Transmitter Mode
To/from TWDR
Load data byte or
Load data byte
Load data byte or
Load data byte
Load data byte or
Load data byte
No TWDR action or
No TWDR action or
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action or
No TWDR action or
No TWDR action
Application Software Response
STA
X
X
X
X
X
X
0
0
1
1
0
0
1
1
ATmega640/1280/1281/2560/2561
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
To TWCR
TWINT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TWEA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken by TWI Hardware
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
263