ATMEGA128RZBV-8AU Atmel, ATMEGA128RZBV-8AU Datasheet - Page 35

MCU ATMEGA1280/AT86RF230 100TQFP

ATMEGA128RZBV-8AU

Manufacturer Part Number
ATMEGA128RZBV-8AU
Description
MCU ATMEGA1280/AT86RF230 100TQFP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA128RZBV-8AU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
100-TQFP
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega128
8.2
8.2.1
8.2.1.1
8.2.1.2
8.2.1.3
2549M–AVR–09/10
Register Description
EEPROM registers
EEARH and EEARL – The EEPROM Address Register
EEDR – The EEPROM Data Register
EECR – The EEPROM Control Register
• Bits 15:12 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bits 11:0 – EEAR8:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 4
Kbytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 4096.
The initial value of EEAR is undefined. A proper value must be written before the EEPROM may
be accessed.
• Bits 7:0 – EEDR7:0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7:6 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in
While EEPE is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be
reset to 0b00 unless the EEPROM is busy programming.
Bit
0x22 (0x42)
0x21 (0x41)
Read/Write
Initial Value
Bit
0x20 (0x40)
Read/Write
Initial Value
Bit
0x1F (0x3F)
Read/Write
Initial Value
EEAR7
R/W
MSB
R/W
15
R
7
0
X
R
7
0
7
0
EEAR6
R/W
R/W
14
R
X
6
0
R
6
0
6
0
ATmega640/1280/1281/2560/2561
EEAR5
EEPM1
R/W
R/W
R/W
13
R
X
5
0
X
5
5
0
EEAR4
EEPM0
R/W
R/W
R/W
12
R
4
0
X
X
4
4
0
EEAR11
EEAR3
EERIE
R/W
R/W
R/W
R/W
11
X
X
3
3
0
3
0
EEAR10
EEMPE
EEAR2
R/W
R/W
R/W
R/W
10
2
0
X
X
2
0
2
EEAR9
EEAR1
EEPE
R/W
R/W
R/W
R/W
1
0
1
X
X
X
9
1
Table 8-1 on page
EEAR8
EEAR0
EERE
LSB
R/W
R/W
R/W
R/W
X
X
0
0
0
0
8
0
EEARH
EEARL
EEDR
EECR
36.
35

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