ATMEGA128RZBV-8AU Atmel, ATMEGA128RZBV-8AU Datasheet - Page 130

• Manufacturer Part Number: ATMEGA128RZBV-8AU
• Description: MCU ATMEGA1280/AT86RF230 100TQFP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RZBV-8AU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 100-TQFP
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega128

2549M–AVR–09/10
Table 15-4.
Note:
• Bits 5:4 – COM0B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC0B) behavior. If one or both of the COM0B1:0
bits are set, the OC0B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0B pin
must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the
WGM02:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 15-5.
Table 15-6
mode.
Table 15-6.
Note:
COM0A1
COM0B1
COM0B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 126
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 124
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to fast PWM
Compare Output Mode, Phase Correct PWM Mode
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM0A0
COM0B0
COM0B0
for more details.
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 15-5
ATmega640/1280/1281/2560/2561
Clear OC0A on Compare Match when up-counting. Set OC0A on
Set OC0A on Compare Match when up-counting. Clear OC0A on
shows the COM0B1:0 bit functionality when the WGM02:0 bits
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
Clear OC0B on Compare Match, set OC0B at BOTTOM
Set OC0B on Compare Match, clear OC0B at BOTTOM
WGM02 = 1: Toggle OC0A on Compare Match.
Normal port operation, OC0A disconnected.
Normal port operation, OC0B disconnected.
Normal port operation, OC0B disconnected.
Compare Match when down-counting.
Compare Match when down-counting.
Toggle OC0B on Compare Match.
Clear OC0B on Compare Match.
Set OC0B on Compare Match.
(non-inverting mode).
(inverting mode).
(1)
Description
Description
Description
Reserved.
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on
130