UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 736

• Manufacturer Part Number: UPD70F3768GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-U 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Ur

Specifications of UPD70F3768GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(n = 0 to 4)
UCnSTR
After reset: 00H
UCnOVE
UCnTSF
The UCnTSF bit is always 1 when performing continuous transmission. When
initializing the transmission unit, check that the UCnTSF bit = 0 before performing
initialization. The transmit data is not guaranteed when initialization is performed
while the UCnTSF bit = 1.
• The operation of the UCnPE bit is controlled by the settings of the
• The UCnPE bit can be read and written, but it can only be cleared by writing 0 to it, and
• Only the first bit of the receive data stop bits is checked, regardless of the value
• The UCnFE bit can be both read and written, but it can only be cleared by
• When an overrun error occurs, the data is discarded without the next receive data
• The UCnOVE bit can be both read and written, but it can only be cleared by writing
UCnTSF
UCnPE
UCnFE
the value is retained.
UCnCTL0.UCnPS1 and UCnCTL0.UCnPS0 bits.
it cannot be set by writing 1 to it. When 1 is written to this bit, the value is retained.
of the UCnCTL0.UCnSL bit.
writing 0 to it, and it cannot be set by writing 1 to it. When 1 is written to this bit,
being written to the receive buffer.
0 to it. When 1 is written to this bit, the value is retained.
<7>
0
1
0
1
0
1
0
1
• When the UCnPWR bit = 0 or the UCnTXE bit = 0 has been set.
• When, following transfer completion, there was no next data transfer
Write to UCnTX register
• When the UCnPWR bit = 0 or the UCnRXE bit = 0 has been set.
• When 0 has been written
When parity of data and parity bit do not match during reception.
• When the UCnPWR bit = 0 or the UCnRXE bit = 0 has been set
• When 0 has been written
When no stop bit is detected during reception
• When the UCnPWR bit = 0 or the UCnRXE bit = 0 has been set.
• When 0 has been written
When receive data has been set to the UCnRX register and the next
receive operation is completed before that receive data has been read
R/W
from UCnTX register
6
0
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
Address: UC0STR FFFFFA04H, UC1STR FFFFFA14H,
5
0
UC2STR FFFFFA24H, UC3STR FFFFFA34H,
UC4STR FFFFFA44H
4
0
Transfer status flag
Overrun error flag
Framing error flag
Parity error flag
3
0
UCnPE
<2>
UCnFE
<1>
UCnOVE
<0>
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