UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 14
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UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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CHAPTER 20 USB FUNCTION CONTROLLER (USBF) ................................................................ 1043
CHAPTER 21 USB HOST CONTROLLER (USBH)......................................................................... 1232
19.17 Timing of Data Communication ............................................................................................ 885
20.1 Overview ............................................................................................................................... 1043
20.2 Configuration........................................................................................................................ 1044
20.3 External Circuit Configuration ............................................................................................ 1046
20.4 Cautions ................................................................................................................................ 1049
20.5 Requests ............................................................................................................................... 1050
20.6 Register Configuration ........................................................................................................ 1058
20.7 STALL Handshake or No Handshake................................................................................. 1181
20.8 Register Values in Specific Status ..................................................................................... 1182
20.9 FW Processing ..................................................................................................................... 1184
21.1 Overview ............................................................................................................................... 1232
21.2 Configuration........................................................................................................................ 1233
21.3 External Circuit Configuration ............................................................................................ 1236
21.4 Cautions ................................................................................................................................ 1239
21.5 Control Registers ................................................................................................................. 1240
21.6 PCI Host Bridge .................................................................................................................... 1241
19.16.1
19.16.2
19.16.3
20.2.1 Block diagram .............................................................................................................................1044
20.2.2 USB memory map.......................................................................................................................1045
20.3.1 Outline ........................................................................................................................................1046
20.3.2 Connection configuration ............................................................................................................1047
20.5.1 Automatic requests .....................................................................................................................1050
20.5.2 Other requests ............................................................................................................................1057
20.6.1 USB control registers ..................................................................................................................1058
20.6.2 USB function controller register list .............................................................................................1060
20.6.3 EPC control registers ..................................................................................................................1076
20.6.4 Data hold registers......................................................................................................................1128
20.6.5 EPC request data registers .........................................................................................................1151
20.6.6 Bridge register.............................................................................................................................1165
20.6.7 DMA register ...............................................................................................................................1170
20.6.8 Bulk-in register ............................................................................................................................1174
20.6.9 Bulk-out register..........................................................................................................................1175
20.6.10
20.9.1 Initialization processing ...............................................................................................................1186
20.9.2 Interrupt servicing .......................................................................................................................1189
20.9.3 USB main processing .................................................................................................................1190
20.9.4 Suspend/Resume processing .....................................................................................................1216
20.9.5 Processing after power application .............................................................................................1219
20.9.6 Receiving data for bulk transfer (OUT) in DMA mode .................................................................1222
20.9.7 Transmitting data for bulk transfer (IN) in DMA mode.................................................................1227
21.2.1 Block diagram .............................................................................................................................1233
21.2.2 USB host controller memory map ...............................................................................................1234
21.2.3 Cautions on data access.............................................................................................................1235
21.3.1 Overview .....................................................................................................................................1236
21.3.2 Connection configuration ............................................................................................................1237
21.3.3 USB power supply ......................................................................................................................1238
21.5.1 USB control registers ..................................................................................................................1240
21.6.1 PCI host bridge ...........................................................................................................................1241
Master operation in single master system ................................................................................878
Master operation in multimaster system...................................................................................878
Slave operation ........................................................................................................................882
Peripheral control registers ....................................................................................................1177
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