UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 535
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UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 535 of 1411
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V850ES/JG3-U, V850ES/JH3-U
9.6.7
to 1. Each time the valid edge input to the TIT0n pin has been detected, the count value of the 16-bit counter is stored in
the TT0CCRn register, and the 16-bit counter is cleared to 0000H.
signal (INTTT0CCn) occurs.
“No edge detection” by using the TT0IOC1 register.
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
In the pulse width measurement mode, 16-bit timer/event counter T starts counting when the TT0CTL0.TT0CE bit is set
The interval of the valid edge can be measured by reading the TT0CCRn register after a capture interrupt request
As shown in Figure 9-39, select either the TIT00 or TIT01 pin as the capture trigger input pin and set the unused pins to
Pulse width measurement mode (TT0MD3 to TT0MD0 bits = 0110)
(external event
trigger input)
trigger input)
count input)
Notes 1. Set by the TT0IOC2.TT0EES1 and TT0IOC2.TT0EES0 bits.
EVTT0 pin
TIT00 pin
TIT01 pin
(capture
(capture
Internal count clock
2. Set by the TT0IOC1.TT0IS1 and TT0IOC1.TT0IS0 bits.
3. Set by the TT0IOC1.TT0IS3 and TT0IOC1.TT0IS2 bits.
Figure 9-39. Configuration in Pulse Width Measurement Mode
detector
detector
detector
Edge
Edge
Edge
Note 1
Note 2
Note 3
selection
TT0CE bit
Count
clock
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
TT0CCR0 register
(capture)
TT0CCR1 register
Clear
16-bit counter
(capture)
INTTT0OV signal
INTTT0CC0 signal
INTTT0CC1 signal
Page 535 of 1408
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