UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 582
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UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-U, V850ES/JH3-U
11.3 Control Registers
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(1) TAB1 option register 1 (TAB1OPT1)
The TAB1OPT1 register is an 8-bit register that controls the interrupt request signal generated by the timer Q option
function.
This register can be rewritten when the TAB1CTL0.TAB1CE bit is 1.
Two rewrite modes (batch write mode and anytime write mode) can be selected, depending on the setting of the
TAB1OPT0.TAB1CMS bit.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
TAB1OPT1
After reset: 00H
TAB1ID4
TAB1ICE
TAB1IOE
TAB1ICE
0
0
0
0
1
1
1
1
<7>
:
0
1
0
1
TAB1ID3
TAB1IOE
Do not use INTTAB1CC0 signal (do not use it as count signal for interrupt
culling).
Use INTTAB1CC0 signal (use it as count signal for interrupt culling).
Do not use INTTAB1OV signal (do not use it as count signal for interrupt
culling).
Use INTTAB1OV signal (use it as count signal for interrupt culling).
0
0
0
0
1
1
1
1
:
R/W
<6>
TAB1ID2
0
0
0
0
1
1
1
1
:
Address: FFFFF580H
Crest interrupt (INTTAB1CC0 signal) enable
5
0
Valley interrupt (INTTAB1OV signal) enable
TAB1ID1
0
0
1
1
0
0
1
1
:
TAB1ID4 TAB1ID3 TAB1ID2 TAB1ID1 TAB1ID0
4
TAB1ID0
0
1
0
1
0
1
0
1
:
CHAPTER 11 MOTOR CONTROL FUNCTION
Not culled (all interrupts are output)
1 masked (one of two interrupts is output)
2 masked (one of three interrupts is output)
3 masked (one of four interrupts is output)
28 masked (one of 29 interrupts is output)
29 masked (one of 30 interrupts is output)
30 masked (one of 31 interrupts is output)
31 masked (one of 32 interrupts is output)
3
Number of times of interrupt
2
:
1
0
Page 582 of 1408
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