UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 417
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 417 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
Note The TABnOVF0 and TABnOVF1 flags are set in the internal RAM by software.
<1> Read the TABnCCR0 register (setting of the default value of the TIABn0 pin input).
<2> Read the TABnCCR1 register (setting of the default value of the TIABn1 pin input).
<3> An overflow occurs. Nothing is done by software.
<4> Read the TABnCCR0 register.
<5> Read the TABnCCR1 register.
<6> Same as <3>
TABnCCR0 register
TABnCCR1 register
INTTABnOV signal
TABnOVF0 flag
TABnOVF1 flag
Example when two capture registers are used (without using overflow interrupt)
Read the overflow flag. If the overflow flag is 1, set only the TABnOVF1 flag to 1, and clear the
overflow flag to 0.
Because the overflow flag is 1, the pulse width can be calculated by (10000H + D
Read the overflow flag. Because the overflow flag is cleared in <4>, 0 is read.
Read the TABnOVF1 flag. If the TABnOVF1 flag is 1, clear it to 0.
Because the TABnOVF1 flag is 1, the pulse width can be calculated by (10000H + D
(correct).
TIABn0 pin input
TIABn1 pin input
16-bit counter
TABnOVF bit
TABnCE bit
FFFFH
0000H
Note
Note
D
00
<1>
D
10
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
<2>
D
00
<3>
D
D
01
10
<4>
D
11
<5> <6>
D
01
D
11
01
− D
00
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