UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 506
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 506 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(2) Operation timing in one-shot pulse output mode
External trigger input
INTTT0CC0 signal
INTTT0CC1 signal
TT0CCR0 register
TT0CCR1 register
(EVTT0 pin input)
TOT00 pin output
TOT01 pin output
(a) Note on rewriting TT0CCRn register
16-bit counter
If the value of the TT0CCRn register is rewritten to a smaller value during counting, the 16-bit counter may
overflow. When an overflow may occur, stop counting and then change the set value.
Remark
When the TT0CCR0 register is rewritten from D
D
than D
and less than D
count value. The counter counts up to FFFFH and then counts up again from 0000H. When the count value
matches D
matches D
Therefore, the counter may output a pulse with a delay period or active period different from that of the one-
shot pulse that is originally expected.
01
TT0CE bit
and D
FFFFH
0000H
11
and less than D
10
n = 0, 1
11
01
, the counter generates the INTTT0CC1 signal and asserts the TOT01 pin. When the count value
, the counter generates the INTTT0CC0 signal, deasserts the TOT01 pin, and stops counting.
> D
00
11
, each set value is reflected as soon as the register has been rewritten and compared with the
, if the TT0CCR1 register is rewritten when the count value of the 16-bit counter is greater
10
Delay
(D
and if the TT0CCR0 register is rewritten when the count value is greater than D
10
D
)
10
Active level width
(D
00
D
− D
00
10
+ 1)
D
10
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
D
Delay
(D
00
00
10
D
to D
)
10
Active level width
(D
00
01
D
− D
00
and the TT0CCR1 register from D
10
+ 1)
D
10
Delay
(10000H + D
D
00
11
)
D
D
D
Active level width
(D
11
11
01
D
01
01
10
− D
to D
Page 506 of 1408
11
+ 1)
11
where D
00
01
>
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