UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 354
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 354 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(2) Interval timer mode operation timing
(a) Operation if TABnCCR0 register is set to 0000H
(b) Operation if TABnCCR0 register is set to FFFFH
INTTABnCC0 signal
If the TABnCCR0 register is set to 0000H, the INTTABnCC0 signal is generated at each count clock
subsequent to the first count clock, and the output of the TOABn0 pin is inverted.
The value of the 16-bit counter is always 0000H.
TABnCCR0 register
Remark
If the TABnCCR0 register is set to FFFFH, the 16-bit counter counts up to FFFFH. The counter is cleared to
0000H in synchronization with the next count-up timing. The INTTABnCC0 signal is generated and the output
of the TOABn0 pin is inverted. At this time, an overflow interrupt request signal (INTTABnOV) is not generated,
nor is the overflow flag (TABnOPT0.TABnOVF bit) set to 1.
Remark
TOABn0 pin output
16-bit counter
Count clock
INTTABnCC0 signal
TABnCE bit
TABnCCR0 register
TOABn0 pin output
n = 0, 1
n = 0, 1
16-bit counter
TABnCE bit
FFFFH
0000H
FFFFH
count clock cycle
Interval time
10000H ×
0000H
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
count clock cycle
Interval time
10000H ×
FFFFH
0000H
0000H
count clock cycle
Count clock cycle
Interval time
Interval time
10000H ×
0000H
Count clock cycle
Interval time
0000H
Page 354 of 1408
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