UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 585
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UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 585 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
(3) TAB1 I/O control register 3 (TAB1IOC3)
The TAB1IOC3 register is an 8-bit register that controls the output of the timer Q option function.
To output from the TOAB1Tm pin, set the TAB1IOC0.TAB1OEm bit to 1 and then set the TAB1IOC3 register.
The TAB1IOC3 register can be rewritten only when the TAB1CTL0.TAB1CE bit is 0.
Rewriting each bit of the TAB1IOC3 register is prohibited when the TAB1CTL0.TAB1CE bit is 1; however the same
value can be rewritten to each bit of the TAB1IOC3 register when the TAB1CTL0.TAB1CE bit is 1.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to A8H.
Caution Set the TAB1IOC3 register to the reset value (A8H) when the timer is used in a mode other than
Remarks 1. Set the output level of the TOAB1Tm pin by using the TAB1IOC0 register.
TAB1IOC3
the 6-phase PWM output mode.
2. m = 1 to 3
After reset: A8H
TAB1OLB3
TAB1OLBm
TAB1OEBm
<7>
0
1
0
1
TAB1OEB3 TAB1OLB2 TAB1OEB2 TAB1OLB1TAB1OEB1
Disable inversion of output of TOAB1Bm pin
Enable inversion of output of TOAB1Bm pin
Disable TOAB1Bm pin output.
•
•
Enable TOAB1Bm pin output.
R/W
When TAB1OLBm bit = 0, low level is output from TOAB1Bm pin.
When TAB1OLBm bit = 1, high level is output from TOAB1Bm pin.
<6>
Address: FFFFF582H
Setting of TOAB1Bm pin output level (m = 1 to 3)
<5>
TOAB1Bm pin output (m = 1 to 3)
<4>
CHAPTER 11 MOTOR CONTROL FUNCTION
<3>
<2>
1
0
0
0
Page 585 of 1408
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