UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 1408
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UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-U, V850ES/JH3-U
E.2 Revision History of Preceding Editions
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
2nd
Here is the revision history of the preceding editions. Chapter indicates the chapter of each edition.
Edition
Addition of Note of 5.5.1 (1) Data wait control register 0 (DWC0)
Addition of Note of 5.5.4 (1) Address wait control register (AWC)
Addition of Note of 5.6 (1) Bus cycle control register (BCC)
Addition of Caution of 20.1 Overview
Change of Figure 20-3. Example of USB Function Controller Connection
Change of 20.4 (2) Stopping the USB clock
Change of 20.6.1 (2) USB function control register (UFCKMSK)
20.6.3 (26) UF0 INT & DMARQ register (UF0IDR)
Change of description of MODE1 bit and MODE0 bit
Change of 20.6.8 (1) UF0 EP1 bulk-in transfer data register (UF0EP1BI)
Change of 20.6.8 (2) UF0 EP3 bulk-in transfer data register (UF0EP3BI)
Change of 20.6.9 (1) UF0 EP2 bulk-out transfer data register (UF0EP2BO)
Change of 20.6.9 (2) UF0 EP4 bulk-out transfer data register (UF0EP4BO)
Addition of 20.9.6 (1) Initial settings for a bulk transfer (OUT: EP2, EP4)
Addition of 20.9.7 (1) Initial settings for a bulk transfer (IN: EP1, EP3)
Change of Table 31-6. Wiring of V850ES/JG3-U Flash Writing Adapters
Change of Table 31-7. Wiring of V850ES/JH3-U Flash Writing Adapters
Addition of 31.6 Creating ROM code to place order for previously written product
Change of 32.2.3 (5) Securement of communication serial interface • Port registers
when CSIF0 is used (a)
Change of 32.2.3 (5) Securement of communication serial interface • Port registers
when CSIF3 is used (a)
Change of 33.1 Absolute Maximum Ratings
Addition of 33.4.1 (1) KYOCERA KINSEKI CORPORATION: Crystal resonator
Addition of 33.4.1 (2) KYOCERA CORPORATION: Ceramic resonator
Addition of 33.4.1 (3) Toyama Murata Mfg. Co. Ltd.: Ceramic resonator
Addition of 33.4.2 (1) Seiko Instruments Inc.: Crystal resonator
Change of 33.5.1 I/O level
Change of 33.5.2 Supply current
Change of Data retention current (MAX. value) of 33.6 (1) In STOP mode
Change of Number of rewrites of 33.9 (1) Basic characteristics
Addition of CHAPTER 35 RECOMMENDED SOLDERING CONDITIONS
Addition of APPENDIX E REVISION HISTORY
Description
APPENDIX E REVISION HISTORY
CHAPTER 5 BUS
CONTROL FUNCTION
CHAPTER 20 USB
FUNCTION
CONTROLLER (USBF)
CHAPTER 31 FLASH
MEMORY
CHAPTER 32 ON-
CHIP DEBUG
FUNCTION
CHAPTER 33
ELECTRICAL
SPECIFICATIONS
CHAPTER 35
RECOMMENDED
SOLDERING
CONDITIONS
APPENDIX E
REVISION HISTORY
Page 1408 of 1408
Chapter
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