UPD70F3768GF-GAT-AX Renesas Electronics America, UPD70F3768GF-GAT-AX Datasheet - Page 555
![no-image](/images/manufacturer_photos/0/5/560/renesas_electronics_america_sml.jpg)
UPD70F3768GF-GAT-AX
Manufacturer Part Number
UPD70F3768GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-U 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Ur
Datasheet
1.UPD70F3763GC-UEU-AX.pdf
(1411 pages)
Specifications of UPD70F3768GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3768GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 555 of 1411
- Download datasheet (8Mb)
V850ES/JG3-U, V850ES/JH3-U
R01UH0043EJ0300 Rev.3.00
Sep 30, 2010
Encoder clear input
Encoder clear input
(TENC00 pin input)
(TENC01 pin input)
(TENC00 pin input)
(TENC01 pin input)
Figure 9-54. Operation Example (When TT0SCE Bit = 1, TT0ZCL Bit = 1, TT0BCL Bit = 0, TT0ACL Bit = 1, TT0UDS1 and
(TECR0 pin input)
(TECR0 pin input)
(ii) If the high level is input to the TECR0 pin at the same time as the low level is input to the TECN01 pin
(iii) If the high level is input to the TECR0 pin earlier than the low level is input to the TENC01 pin while
TT0CNT register
TT0CNT register
Peripheral clock
Peripheral clock
Encoder input
Encoder input
Encoder input
Encoder input
timing signal
timing signal
while the counter is counting up, the counter is cleared without counting up.
the counter is counting up, the counter is cleared without counting up.
Clear signal
Clear signal
Count
Count
TT0UDS0 Bits = 11, TECR0 = High Level, TENC01 = Low Level, and TENC00 = High Level) (2/3)
N
N
H
L
H
H
L
H
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
0000H
0000H
Page 555 of 1408
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