ATXMEGA32A4-CUR Atmel, ATXMEGA32A4-CUR Datasheet - Page 29

• Manufacturer Part Number: ATXMEGA32A4-CUR
• Description: MCU AVR 32+4 FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA32A4-CUR

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.15.12
8077H–AVR–12/09
LOCKBITS - Non-Volatile Memory Lock Bit Register
• Bit 5:2 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 1 - EELOAD: EEPROM Page Buffer Active Loading
The EELOAD status flag indicates that the temporary EEPROM page buffer has been loaded
with one or more data bytes. Immediately after an EEPROM load command is issued and byte is
written to NVMDR, or a memory mapped EEPROM buffer load operation is performed, the
EELOAD flag is set, and it remains set until an EEPROM page write- or a page buffer flush oper-
ation is executed.
• Bit 0 - FLOAD: Flash Page Buffer Active Loading
The FLOAD flag indicates that the temporary Flash page buffer has been loaded with one or
more data bytes. Immediately after a Flash load command has been issues and byte is written to
NVMDR, the FLOAD flag is set, and it remains set until an Application- or Boot page write- or a
page buffer flush operation is executed.
This register is a direct mapping of the NVM Lockbits into the IO Memory Space, in order to
enable direct read access from the application software. Refer to
Memory Lock Bit Register” on page 34
Bit
+0x07
Read/Write
Initial Value
R
7
1
BLBB[1:0]
R
6
1
R
5
1
BLBA[1:0]
for description of the Lock Bits.
R
4
1
R
3
1
BLBAT[1:0]
2
R
1
”LOCKBITS - Non-Volatile
R
1
1
LB[1:0]
XMEGA A
R
0
1
LOCKBITS
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