ATXMEGA32A4-CUR Atmel, ATXMEGA32A4-CUR Datasheet - Page 279

• Manufacturer Part Number: ATXMEGA32A4-CUR
• Description: MCU AVR 32+4 FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA32A4-CUR

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.11 Register Description - EBI
24.11.1
8077H–AVR–12/09
CTRL - EBI Control Register
• Bit 7:6 - SDDATAW[1:0]: EBI SDRAM Data Width Setting
These bits select the EBI SDRAM data width configuration according to
Table 24-6.
Note:
• Bit 5:4 - LPCMODE[1:0]: EBI SRAM Low Pin-count Mode
These bits select the EBI SRAM LPC configuration according to
Table 24-7.
• Bit 3:2 - SRMODE[1:0]: SRAM Mode
These bits selects the EBI SRAM configuration according to
Table 24-8.
Note:
Bit
+0x00
Read/Write
Initial Value
LPCMODE[1:0]
SDDATAW[1:0]
SRMODE[1:0]
1. 8-bit data bus only available for 4-port EBI interface
1. ALE2 and NOALE only available with 4-port EBI interface
00
01
10
11
00
01
10
11
00
01
10
11
SDRAM Mode
SRAM LPC Mode
SRAM Mode
R/W
SDDATAW[1:0]
7
0
Group Configuration
4BIT
8BIT
-
-
Group Configuration
ALE1
-
ALE12
-
Group Configuration
ALE1
ALE2
ALE12
NOALE
R/W
(1)
(1)
6
0
(1)
R/W
LPCMODE[1:0]
5
0
R/W
ALE
ALE1
ALE2
ALE1 & 2
No ALE
4
0
Description
4 bit data bus
8 bit data bus
Reserved
Reserved
ALE
ALE1
-
ALE1 & 2
-
R/W
SRMODE[1:0]
3
0
Description
Address byte 0 and 1 multiplexed
Address byte 0 and 2 multiplexed
Address byte 0, 1 and 2 multiplexed
No address multiplexing
Description
Data multiplexed with Address byte 0
Reserved
Data multiplexed with Address byte 0 and 1
Reserved
Table 24-8 on page
R/W
2
0
Table 24-7 on page 279
R/W
1
0
IFMODE[1:0]
Table 24-6 on page
XMEGA A
R/W
0
0
279.
CTRL
279.
279