ATXMEGA32A4-CUR Atmel, ATXMEGA32A4-CUR Datasheet - Page 11

• Manufacturer Part Number: ATXMEGA32A4-CUR
• Description: MCU AVR 32+4 FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA32A4-CUR

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.10
3.10.1
3.10.2
3.10.3
8077H–AVR–12/09
RAMP and Extended Indirect Registers
RAMPX, RAMPY and RAMPZ Registers
RAMPD Register
EIND - Extended Indirect Register
In order to access program memory or data memory above 64K bytes, the address or address
pointer must be more than 16-bits. This is done by concatenating one register to one of the X-,
Y- or Z-registers, and this register then holds the most significant byte (MSB) in a 24-bit address
or address pointer.
These registers are only available on devices with external bus interface and/or more than 64K
bytes of program or data memory space. For these devices, only the number of bits required to
address the whole program and data memory space in the device is implemented in the
registers.
The RAMPX, RAMPY and RAMPZ registers are concatenated with the X-, Y-, and Z-registers
respectively to enable indirect addressing of the whole data memory space above 64K bytes
and up to 16M bytes.
Figure 3-6.
When reading (ELPM) and writing (SPM) program memory locations above the first 128K bytes
of the program memory, RAMPZ is concatenated with the Z-register to form the 24-bit address.
LPM is not affected by the RAMPZ setting.
This register is concatenated with the operand to enable direct addressing of the whole data
memory space above 64K bytes. Together RAMPD and the operand will form a 24-bit address.
Figure 3-7.
EIND is concatenated with the Z-register to enable indirect jump and call to locations above the
first 128K bytes (64K words) of the program memory.
Figure 3-8.
Bit (Individually)
Bit (X-pointer)
Bit (Individually)
Bit (Y-pointer)
Bit (Individually)
Bit (Z-pointer)
Bit (Individually)
Bit (D-pointer)
Bit (Individually)
Bit (D-pointer)
The combined RAMPX + X, RAMPY + Y and RAMPZ + Z registers
The combined RAMPD + K register
The combined EIND + Z register
23
23
23
23
7
23
7
7
7
7
RAMPD
RAMPX
RAMPY
RAMPZ
EIND
16
0
16
0
16
16
16
0
0
0
15
15
15
7
15
15
15
7
7
7
ZH
XH
YH
ZH
0
8
0
8
0
8
0
8
K
7
7
7
7
7
7
7
7
XMEGA A
ZL
XL
YL
ZL
0
0
0
0
0
0
0
0
0
0
11