ATXMEGA32A4-CUR Atmel, ATXMEGA32A4-CUR Datasheet - Page 193

• Manufacturer Part Number: ATXMEGA32A4-CUR
• Description: MCU AVR 32+4 FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA32A4-CUR

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3.4
17.3.5
17.3.6
8077H–AVR–12/09
INTFLAGS - RTC Interrupt Flag Register
TEMP - RTC Temporary Register
CNTH - Real Time Counter Register H
• Bits 7:2 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 1 - COMPIF: RTC Compare Match Interrupt Flag
This flag is set on the next count after a Compare Match condition occurs. The flag is cleared
automatically when RTC compare match interrupt vector is executed. The flag can also be
cleared by writing a one to its bit location.
• Bit 0 - OVFIF: RTC Overflow Interrupt Flag
This flag is set on the next count after an Overflow condition occurs. The flag is cleared automat-
ically when RTC overflow interrupt vector is executed. The flag can also be cleared by writing a
one to its bit location.
• Bits 7:0 - TEMP[7:0]: Real Time Counter Temporary Register
This register is used for 16-bit access to the counter value, compare value and top value regis-
ters. The low byte of the 16-bit register is stored here when it is written by the CPU. The high
byte of the 16-bit register is stored when low byte is read by the CPU. For more details refer to
”Accessing 16-bits Registers” on page
The CNTH and CNTL register pair represents the 16-bit value CNT. CNT counts positive clock
edges on the prescaled RTC clock. Reading and writing 16-bit values require special attention,
refer to
Due to synchronization between RTC clock and the system clock domains, there is a latency of
two RTC clock cycles from updating the register until this has an effect. Application software
needs to check that the SYNCBUSY flag in the
on page 192
Bit
+0x03
Read/Write
Initial Value
Bit
+0x04
Read/Write
Initial Value
Bit
+0x09
Read/Write
Initial Value
”Accessing 16-bits Registers” on page 12
is cleared before writing to this register.
R/W
R/W
R
7
0
7
0
7
0
-
R/W
R/W
R
6
0
6
0
6
0
-
R/W
R/W
R
5
0
5
0
5
0
-
12.
R/W
R/W
R
4
0
4
0
4
0
-
TEMP[7:0]
CNT[15:8]
”STATUS - Real Time Counter Status Register”
for details.
R/W
R/W
3
R
0
3
0
3
0
-
R/W
R/W
2
R
0
2
0
2
0
-
COMPIF
R/W
R/W
R/W
1
0
1
0
1
0
XMEGA A
OVFIF
R/W
R/W
R/W
0
0
0
0
0
0
INTFLAGS
TEMP
CNTH
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