ATXMEGA32A4-CUR Atmel, ATXMEGA32A4-CUR Datasheet - Page 136

MCU AVR 32+4 FLASH 49VFBGA

ATXMEGA32A4-CUR

Manufacturer Part Number
ATXMEGA32A4-CUR
Description
MCU AVR 32+4 FLASH 49VFBGA
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheets

Specifications of ATXMEGA32A4-CUR

Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
49-VFBGA
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA32A4-CUR
Manufacturer:
Atmel
Quantity:
10 000
13.8
13.9
8077H–AVR–12/09
Port Event
Alternate Port Functions
Table 13-3.
Port pins can generate an event when there is a change on the pin. The sense configurations
decide when each pin will generate events. Event generation requires the presence of a periph-
eral clock, hence asynchronous event generation is not possible. For edge sensing, the
changed pin value must be sampled once by the peripheral clock for an event to be generated.
A level sensing, a low level pin value will not generate events, and a high pin value will continu-
ously generate events. For events to be generated on low level, the pin configuration mst be set
to inverted I/O.
Most port pins have alternate pin functions in addition to being a general purpose I/O pin. When
an alternate function is enabled this might override the normal port pin function or pin value. This
happens when other peripherals that require pins are enabled or configured to use pins. If, and
how a peripheral will override and use pins is described in section for that peripheral.
The port override signals and related logic (grey) is shown in
signals are not accessible from software, but are internal signals between the overriding periph-
eral and the port pin.
Sense settings
Rising edge
Falling edge
Both edges
Low level
Limited asynchronous sense support
Supported
Yes
Yes
No
No
Interrupt description
-
-
Pin value must be kept unchanged.
Pin-level must be kept unchanged.
Figure 13-10 on page
XMEGA A
137. These
136

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